Advantech PCM-3780 manual Appendix D Waveform of Each Mode, Counter Mode Descriptions

Appendix D Waveform of Each Mode

D.1 Counter Mode Descriptions

Counter Mode register bits CM15-CM12 and CM6-CM4 select the oper- ating mode for each counter (see Table D-1). To simplify references to a particular mode, each mode is assigned a letter from A through X. Repre- sentative waveforms for the counter modes are illustrated in Figure A through X (because the letter suffix in the figure number is keyed to the mode, Figures M, N, P, Q, V, and W do not exist).

The figures assume counting on rising source edges. These modes (which automatically disarm the counter) (CM4 = 0) are shown with the WR pulse entering the required ARM command. For modes that count repeti- tively (CM4 = 1) the ARM command is omitted. Both a TC output wave- form and a TC Toggled output waveform are shown for each mode.

The symbols L and H are used to represent count values equal to the Load and Hold register contents, respectively. The symbols K and N rep- resent arbitrary count values. For each mode, the required bit pattern in the Counter Mode register is shown; "don't care" bits are marked "X". These figures are designed to clarify the mode descriptions.

To keep the following mode descriptions concise and to the point, the phrase "source edges" is used to refer to active-going source edges only, not to inactive-going edges. Similarly, the phrase "gate edges" refers only to active-going gate edges. Also, again to avoid verbosity and euphuism, the descriptions of some modes state that a counter is stopped or disarmed "on a TC, inhibiting further counting."

As is fully explained in the TC section of the document, for these modes the counter is actually stopped or disarmed following the active-going source edge, which drives the counter out of TC. In other words, since a counter in the TC state always counts, irrespective of its gating of arming status, the stopping or disarming of the count sequence is delayed until TC is terminated.

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