C.8 | Interrupt Control Register |
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15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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HEX |
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22h | W | Interrupt Control Register |
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1.C1 to C0: Counter Interrupt enable Bit
0= Not enable interrupt for this counter
1= Enable interrupt for this counter
2.DIA, DIB and DIC: DI Interrupt enable Bit
0= Not enable interrupt for DI
1= Enable interrupt for DI
C.9 | Interrupt Status Register |
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15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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22h | W |
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| R | Interrupt Status Register |
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1.C1 to C0: Counter Interrupt Status Bit
0= No interrupt occur
1= Interrupt occur
2.DIA, DIB and DIC: Interrupt Status Bit
0= No interrupt occurred
1= Interrupt occured
39 | AppendixC |