Appendix B Block Diagram | Advantech PCM-3780 specs

Appendix B Block Diagram

PCM-3780 User Manual

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Advantech PCM-3780 manual Appendix B Block Diagram

Contents

Ch Counter/Timer with Ch TTL DIO Module PCM-3780 Copyright Acknowledgements Two Years Product Warranty CE Notification FCC Class a Technical Support and Assistance Packing List Page Contents Appendix Specifications Introduction Features PCM-3780 Counter Mode Counter Modes PCM-3780 Counter Mode Installation Guide Applications Installation Flow Chart Device Drivers Software OverviewDevice Drivers on the companion CD-ROM Register-level Programming Device Drivers Programming Roadmap Programming Tools Troubleshooting Device Drivers Error Programming with Device Drivers Function Library Wiring Boards AccessoriesWiring Cables Hardware Installation Unpacking Driver Installation Companion CD-ROM Different Options for Driver Setup Hardware Installation Installing the ModulePage Pin Assignments & Jumper Settings Signal Connections Overview Switch and Jumper Settings Interrupt Level IRQ Setting JP1 Base Address Setting SW1 Base Address Setting CN4 Counter Interface Connector Connectors Pin AssignmentCN3 I/O Port Connector Connector Signal Description Reference Direction Description Period Measurement Using Advantech 32-bit DLL DriverUsing Direct I/O Frequency Measurement Frequency Measurement Specifications Programmable Counter Digital Input/Output General Page Block Diagram Appendix B Block Diagram Register Structure & Format Appendix C Register Structure & Format I/O Port Address Map Register Format Table C.1 Register Offset Address Table CE CE CM1 to CM0 Output Control Counter 0/1 Mode RegisterCM2 Output Enable Control CM6 to CM3 Count Control CM6 CM14 Gating Polarity Selection CM7 Count Source EdgeCM13 to CM12 Gate Source Selection CM15 Gate Active Edge or Level Counter 0/1 Load Register Counter 0/1 Hold Register C2 to C0 Command Code Counter 0/1 Command RegisterCounter Command Enable Register CE1 to CE0 Counter Command Enable Bit Interrupt Control Register Interrupt Status Register Port A/B/C Interrupt Status Register Interrupt Clear RegisterDirection Control Register O Direction Control Bit Fout Register DV3 to DV0 Fout Divider Divide by 1 to 16 0000 = Divide by FOE Fout Output Enable FS2 to FS0 Fout Source Waveform of Each Mode Appendix D Waveform of Each Mode Counter Mode Descriptions Table D.1 PCM-3780 Counter Mode Table D.2 PCM-3780 Counter Mode Mode a Waveforms Software-Triggered Strobe with No Hardware Gating Mode B Waveforms Software-Triggered Strobe with Level Gating Mode C Waveforms Hardware-Triggered Strobe Mode D Waveforms Rate Generator with No Hardware Gating Mode E Waveforms Rate Generator with Level Gating Mode F Waveforms Non-Retriggerable One-Shot Mode G Waveforms Software-Triggered Delayed Pulse One-Shot Mode H Waveforms Mode I Waveforms Hardware-Triggered Delayed Pulse Strobe Mode J Waveforms Variable Duty Cycle Rate Generator with No Hardware Gating Mode K Waveforms Variable Duty Cycle Rate Generator with Level Gating Mode L Waveforms Hardware-Triggered Delayed Pulse One-Shot Mode O Waveforms Hardware-Triggered Strobe with Edge Disarm Mode R Waveforms Non-Retriggerbale One-Shot with Edge Disarm Mode U Waveforms Hardware-Triggered Delayed Pulse Strobe with Edge Disarm Mode X Waveforms Hardware-Triggered Delayed Pulse One-Shot with Edge Disarm