Appendix C Register Structure & Format | Advantech PCM-3780 manual

Appendix C Register Structure & Format

C.1 Overview

PCM-3780 is delivered with an easy-to-use 32-bit DLL driver for user programming under the Windows 2000/XP operating system. We advise users to program the PCM-3780 using the 32-bit DLL driver provided by Advantech to avoid the complexity of low-level programming by register.

The most important consideration in programming the PCM-3780 at reg- ister level is to understand the function of the card's registers. The infor- mation in the following sections is provided only for users who would like to do their own low-level programming.

C.2 I/O Port Address Map

The PCM-3780 requires 64 consecutive addresses in the PC's I/O space. The address of each register is specified as an offset from the card's base address. For example, BASE+0 is the card's base address and BASE+6 is the base address plus six bytes.

Table C-1 shows the function of each register of the PCM-3780 or driver and its address relative to the card's base address.

PCM-3780 User Manual

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Advantech PCM-3780 manual Appendix C Register Structure & Format, I/O Port Address Map

Contents

Ch Counter/Timer with Ch TTL DIO Module PCM-3780 Copyright Acknowledgements Two Years Product Warranty CE Notification FCC Class a Technical Support and Assistance Packing List Page Contents Appendix Specifications Introduction Features PCM-3780 Counter Mode Counter Modes PCM-3780 Counter Mode Installation Guide Applications Installation Flow Chart Software Overview Device Drivers on the companion CD-ROMDevice Drivers Register-level Programming Device Drivers Programming Roadmap Programming Tools Troubleshooting Device Drivers Error Programming with Device Drivers Function Library Wiring Cables AccessoriesWiring Boards Hardware Installation Unpacking Driver Installation Companion CD-ROM Different Options for Driver Setup Hardware Installation Installing the ModulePage Pin Assignments & Jumper Settings Signal Connections Overview Switch and Jumper Settings Interrupt Level IRQ Setting JP1 Base Address Setting SW1 Base Address Setting CN3 I/O Port Connector Connectors Pin AssignmentCN4 Counter Interface Connector Connector Signal Description Reference Direction Description Using Direct I/O Using Advantech 32-bit DLL DriverPeriod Measurement Frequency Measurement Frequency Measurement Specifications Programmable Counter Digital Input/Output General Page Block Diagram Appendix B Block Diagram Register Structure & Format Appendix C Register Structure & Format I/O Port Address Map Register Format Table C.1 Register Offset Address Table CE CE Counter 0/1 Mode Register CM2 Output Enable ControlCM1 to CM0 Output Control CM6 to CM3 Count Control CM6 CM7 Count Source Edge CM13 to CM12 Gate Source SelectionCM14 Gating Polarity Selection CM15 Gate Active Edge or Level Counter 0/1 Load Register Counter 0/1 Hold Register Counter 0/1 Command Register Counter Command Enable RegisterC2 to C0 Command Code CE1 to CE0 Counter Command Enable Bit Interrupt Control Register Interrupt Status Register Interrupt Clear Register Direction Control RegisterPort A/B/C Interrupt Status Register O Direction Control Bit Fout Register DV3 to DV0 Fout Divider Divide by 1 to 16 0000 = Divide by FOE Fout Output Enable FS2 to FS0 Fout Source Waveform of Each Mode Appendix D Waveform of Each Mode Counter Mode Descriptions Table D.1 PCM-3780 Counter Mode Table D.2 PCM-3780 Counter Mode Mode a Waveforms Software-Triggered Strobe with No Hardware Gating Mode B Waveforms Software-Triggered Strobe with Level Gating Mode C Waveforms Hardware-Triggered Strobe Mode D Waveforms Rate Generator with No Hardware Gating Mode E Waveforms Rate Generator with Level Gating Mode F Waveforms Non-Retriggerable One-Shot Mode G Waveforms Software-Triggered Delayed Pulse One-Shot Mode H Waveforms Mode I Waveforms Hardware-Triggered Delayed Pulse Strobe Mode J Waveforms Variable Duty Cycle Rate Generator with No Hardware Gating Mode K Waveforms Variable Duty Cycle Rate Generator with Level Gating Mode L Waveforms Hardware-Triggered Delayed Pulse One-Shot Mode O Waveforms Hardware-Triggered Strobe with Edge Disarm Mode R Waveforms Non-Retriggerbale One-Shot with Edge Disarm Mode U Waveforms Hardware-Triggered Delayed Pulse Strobe with Edge Disarm Mode X Waveforms Hardware-Triggered Delayed Pulse One-Shot with Edge Disarm