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HSC-ADC-EVALC
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AD19 to be Used with Higher Density Sram Devices
Models:
HSC-ADC-EVALC
1
12
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Functional Block Diagram
Configuration Eeprom
Connection and Setup
Connector J2
U4 DIP Switch Setting
Sram and Fpga Power
Page 12
Image 12
HSC-ADC-EVALC
AD19 TO BE USED WITH HIGHER
DENSITY SRAM DEVICES
06676-008
Figure 8.
Rev. 0 Page 12 of 32
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Page 12
Image 12
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Contents
Features
Functional Block Diagram
Equipment Needed
Product Highlights
HSC-ADC-EVALC Table of Contents
HSC-ADC-EVALC
Product Description
Evaluation Board Description
Power Supplies
Connection and Setup
HSC-ADC-EVALC ADC Capture Board Easy Start
U4 DIP Switch Setting
Jumpers
Jumper Number Description
HSC-ADC-EVALC ADC Capture Board Features
HSC-ADC-EVALC Components Top View
HSC-ADC-EVALC Supported ADC Evaluation Boards
HSC-ADC-EVALC Components Bottom View
HSC-ADC-EVALC Theory of Operation
HSC-ADC-EVALC Evaluation Board Schematics and Artwork
HSC-ADC-EVALC Schematics
Sram Address and Control
Fpga to Sram Data
AD19 to be Used with Higher Density Sram Devices
Sram and Fpga Power
Sram a Bypass CAP
Unused Rocket I/0 Connections
Rocket I/0 Connections
USB Connections
Rev Page 18
EZ-KIT Expansion Interface for DSPs
Tyco HM
Configuration Eeprom
Power and Voltage Regulators
PCB Layout
Top Silkscreen
HSC-ADC-EVALC
J1 HS-SERIAL/SPI/AUX
Connector J2
Schematic Net Name Fpga Pin
Connector J3
HSC-ADC-EVALC J3 I/O Connections to Fpga U1
HSC-ADC-EVALC Ordering Information
Qty
Manufacturer
Part Number
Qty Reference Designator Description
R16
Ordering Guide ESD Caution
Model Description
Rev Page 31
Rev Page 32
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