PRELIMINARY

CY14B104K, CY14B104M

 

4 Mbit (512K x 8/256K x 16) nvSRAM with Real Time Clock

Features

20 ns, 25 ns, and 45 ns access times

Internally organized as 512K x 8 (CY14B104K) or 256K x 16 (CY14B104M)

Hands off automatic STORE on power down with only a small capacitor

STORE to QuantumTrap® nonvolatile elements is initiated by software, device pin, or AutoStore® on power down

RECALL to SRAM initiated by software or power up

High reliability

Infinite Read, Write, and RECALL cycles

200,000 STORE cycles to QuantumTrap

20 year data retention

Single 3V +20%, –10% operation

Data integrity of Cypress nvSRAM combined with full featured Real Time Clock

Watchdog timer

Clock alarm with programmable interrupts

Capacitor or battery backup for RTC

Commercial and industrial temperatures

44 and 54-pin TSOP II package

Pb-free and RoHS compliance

Functional Description

The Cypress CY14B104K/CY14B104M combines a 4-Mbit nonvolatile static RAM with a full featured Real Time Clock in a monolithic integrated circuit. The embedded nonvolatile elements incorporate QuantumTrap technology producing the world’s most reliable nonvolatile memory. The SRAM is read and written infinite number of times, while independent nonvolatile data resides in the nonvolatile elements.

The Real Time Clock function provides an accurate clock with leap year tracking and a programmable, high accuracy oscillator. The alarm function is programmable for periodic minutes, hours, days or months alarms. There is also a programmable watchdog timer for process control.

Logic Block Diagram

[1, 2, 3]

 

 

Trap

 

 

 

CCP

 

 

 

Quatrum

 

 

V

 

 

VCA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2048 X 2048

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A0

R

 

POWER

VRTCbat

A1

STORE

CONTROL

VRTCcap

O

A2

W

RECALL

 

 

A3

 

 

 

 

 

STORE/RECALL

 

A4

D

 

HSB

A5

E

STATIC RAM

CONTROL

 

A6

C

ARRAY

 

 

A7

O

2048 X 2048

SOFTWARE

 

D

 

 

A8

 

A14 - A2

E

 

DETECT

A17

 

 

R

 

 

 

A18

 

 

 

 

 

 

 

DQ0

 

 

 

DQ1

 

 

 

DQ2

 

 

X1

DQ3

 

 

 

RTC

X2

DQ4

I

 

INT

DQ5

N

 

 

P

 

 

DQ6

U

 

 

DQ7

T

 

 

B

COLUMN I/O

 

DQ8

U

MUX

A18- A0

F

 

 

DQ9

F

 

 

DQ10

E

COLUMN DEC

OE

R

WE

 

DQ11

S

 

 

 

DQ12

 

 

 

DQ13

 

 

CE

DQ14

A9

A10 A11 A12 A13 A14 A15 A16

BLE

DQ15

 

 

 

BHE

Notes

1.Address A0 - A18 for x8 configuration and Address A0 - A17 for x16 configuration.

2.Data DQ0 - DQ7 for x8 configuration and Data DQ0 - DQ15 for x16 configuration.

3.BHE and BLE are applicable for x16 configuration only.

Cypress Semiconductor Corporation • 198 Champion Court

San Jose, CA 95134-1709

408-943-2600

Document #: 001-07103 Rev. *K

 

Revised January 29, 2009

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Cypress CY14B104K, CY14B104M manual Features, Functional Description, Cypress Semiconductor Corporation 198 Champion Court