51-85160 | Cypress CY14B104K, CY14B104M specification

PRELIMINARY	CY14B104K, CY14B104M

Package Diagrams (continued)

Figure 18. 54-Pin TSOP II (51-85160)

51-85160 **

Document #: 001-07103 Rev. *K

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Cypress CY14B104K, CY14B104M manual 51-85160

Contents

Features Functional DescriptionCypress Semiconductor Corporation 198 Champion Court Pinouts AutoStore Operation Device OperationSram Read Sram Write Software Store Hardware Recall Power UpHardware Store HSB Operation Software Recall Store Mode SelectionA15 A06 Mode Power Preventing AutoStore Data Protection Noise ConsiderationsReal Time Clock Operation Alarm Watchdog TimerCalibrating the Clock Flags Register Power MonitorInterrupt Register Interrupts AF Alarm Flag WDF Watchdog Timer FlagPF Power Fail Flag PFE Power Fail Enable Oscen WDSWDF Oscf For the register is 0x7FFF9 0x3FFF9 Time Keeping Seconds Write only. Reading it always returns a 0x7FFF5 0x3FFF5 Alarm DayTime-base Watchdog Document # 001-07103 Rev. *K 0x7FFF2 0x3FFF2 Alarm SecondsCenturies 0x7FFF0 0x3FFF0 Flags This condition and write 0 to clear this flag Operating Range DC Electrical CharacteristicsRange Ambient Temperature Maximum Ratings AC Test Conditions Data Retention and EnduranceCapacitance Thermal Resistance RTC Capacitor Pin Voltage TOCS RTC Oscillator Time to Start RTC Backup CurrentHot Temperature 85 oC RTC Battery Pin Voltage Sram Write Cycle AC Switching CharacteristicsSwitching Waveforms Parameters Sram Read Cycle Data Input Input Data Valid Data Output High Impedance Output Data ValidStandby Active Address Valid Address Address Valid Data Input Data OutputInput Data Valid High Impedance Not applicable for RTC register writes Parameters Description 20 ns 25 ns 45 ns Unit Min Max AutoStore/Power Up Recall Software Controlled Store and Recall Cycle Hardware Store Pulse Width To Output Active Time when write latch not setHardware Store Cycle Description 20 ns 25 ns 45 ns Unit Min Truth Table For Sram Operations For x8 ConfigurationFor x16 Configuration Inputs and Outputs Mode Power Part Numbering Nomenclature CY14 B 104 K ZS P 20 X C T ZS TsopNvsram Ordering Information Pin Tsop II Package Diagrams 51-85160 UHA Document HistoryTUP PCI GVCH/PYRS 6 Updated Starting and stopping the oscillator description Added 20 ns access speed in FeaturesFootnote 1 and 8 referenced for Mode selection Table 6 updated Data protection description Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsUSB