Cypress CY7C1245V18 manual Logic Block Diagram CY7C1241V18, Logic Block Diagram CY7C1256V18, Doff

CY7C1241V18, CY7C1256V18

CY7C1243V18, CY7C1245V18

Logic Block Diagram (CY7C1241V18)

					D[7:0]	8
						Address
A(19:0)						Register
				20
			K			CLK
			K
						Gen.
		DOFF
	VREF
	WPS					Control
						Logic
	NWS[1:0]

	Write	Write	Write		Write
								Address
	Reg	Reg	Reg		Reg			Register
Decode	1M x 8	1M x 8	1M x 8		1M x 8	Decode
WriteAdd.	Array	Array	Array		Array	ReadAdd.				Logic
									Control
	Read Data Reg.
			32	16
							Reg.				Reg.
				16
							Reg.

8

20A(19:0)

RPS

CQ

CQ

Q[7:0]

8

QVLD

Logic Block Diagram (CY7C1256V18)

						D[8:0]	9
							Address
A(19:0)							Register
					20
			K				CLK
			K
							Gen.
		DOFF
	VREF
	WPS						Control
	BWS			[0]			Logic

Document Number: 001-06365 Rev. *D

	Write	Write	Write		Write
								Address
	Reg	Reg	Reg		Reg
								Register
Decode	1M x 9	1M x 9	1M x 9		1M x 9	Decode
WriteAdd.	Array	Array	Array		Array	ReadAdd.				Logic
									Control
	Read Data Reg.
			36	18
							Reg.				Reg.
				18
							Reg.

9

20A(19:0)

RPS

CQ

CQ

Q[8:0]

9

QVLD

Page 2 of 28

[+] Feedback