Cypress CY7C1361C, CY7C1363C 3.3V TAP AC Test Conditions, 3.3V TAP AC Output Load Equivalent , 2.5V TAP AC Test Conditions, 2.5V TAP AC Output Load Equivalent, TAP DC Electrical Characteristics And Operating Conditions , Identification Register Definitions

CY7C1361C
CY7C1363C
Document #: 38-05541 Rev. *F Page 15 of 31
3.3V TAP AC Test Conditions
Input pulse levels................................................ VSS to 3.3V
Input rise and fall times...................................................1 ns
Input timing reference levels...........................................1.5V
Output reference levels...................................................1.5V
Test load termination supply voltage...............................1.5V
3.3V TAP AC Output Load Equivalent
2.5V TAP AC Test Conditions
Input pulse levels.................................................VSS to 2.5V
Input rise and fall time.....................................................1 ns
Input timing reference levels.........................................1.25V
Output reference levels................................................1.25V
Test load termination supply voltage............................1.25V
2.5V TAP AC Output Load Equivalent
T
DO
1.5V
20p
F
Z = 50Ω
O
50Ω
T
DO
1.25V
20p
F
Z = 50Ω
O
50Ω
TAP DC Electrical Characteristics And Operating Conditions
(0°C < TA < +70°C; VDD = 3.3V ±0.165V unless otherwise noted)[11]
Parameter Description Description Conditions Min. Max. Unit
VOH1 Output HIGH Voltage IOH = –4.0 mA V DDQ = 3.3V 2.4 V
IOH = –1.0 mA VDDQ = 2.5V 2.0 V
VOH2 Output HIGH Voltage IOH = –100 µA VDDQ = 3.3V 2.9 V
VDDQ = 2.5V 2.1 V
VOL1 Output LOW Voltage IOL = 8.0 mA VDDQ = 3.3V 0.4 V
IOL = 8.0 mA VDDQ = 2.5V 0.4 V
VOL2 Output LOW Voltage IOL = 100 µA VDDQ = 3.3V 0.2 V
VDDQ = 2.5V 0.2 V
VIH Input HIGH Voltage VDDQ = 3.3V 2.0 VDD + 0.3 V
VDDQ = 2.5V 1.7 VDD + 0.3 V
VIL Input LOW Voltage VDDQ = 3.3V –0.5 0.7 V
VDDQ = 2.5V –0.3 0.7 V
IXInput Load Current GND < VIN < VDDQ –5 5 µA
Identification Register Definitions
Instruction Field CY7C1361C (256K x36) CY7C1363C (512K x18) Description
Revision Number (31:29) 000 000 Describes the version number.
Device Depth (28:24)[12] 01011 01011 Reserved for Internal Use
Device Width (23:18) 119-BGA 101001 101001 Defines memory type and architecture
Device Width (23:18) 165-FBGA 000001 000001 Defines memory type and architecture
Cypress Device ID (17:12) 100110 010110 Defines width and density
Cypress JEDEC ID Code (11:1) 00000110100 00000110100 Allows unique identification of SRAM vendor.
ID Register Presence Indicator (0) 1 1 Indicates the presence of an ID register.
Notes:
11.All voltages referenced to VSS (GND).
12.Bit #24 is “1” in the Register Definitions for both 2.5V and 3.3V versions of this device.
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