CY7C1471V25
CY7C1473V25
CY7C1475V25
Document #: 38-05287 Rev. *I Page 17 of 32
1.8V TAP AC Test Conditions
Input pulse levels.....................................0.2V to VDDQ – 0.2
Input rise and fall time.....................................................1 ns
Input timing reference levels...........................................0.9V
Output reference levels...................................................0.9V
Test load termination supply voltage...............................0.9V
2.5V TAP AC Test Conditions
Input pulse levels.................................................VSS to 2.5V
Input rise and fall time.....................................................1 ns
Input timing reference levels.........................................1.25V
Output reference levels................................................1.25V
Test load termination supply voltage............................1.25V
1.8V TAP AC Output Load Equivalent

TDO

0.9V

20pF

Z = 50Ω

O

50Ω

2.5V TAP AC Output Load Equivalent

TDO

1.25V

20pF

Z = 50Ω

O

50Ω

TAP DC Electrical Characteristics And Operating Conditions
(0°C < TA < +70°C; VDD = 2.375 to 2.625 unless otherwise noted)[12]
Parameter Description Test Conditions Min. Max. Unit
VOH1 Output HIGH Voltage IOH = –1.0 mA, VDDQ = 2.5V 2.0 V
VOH2 Output HIGH Voltage IOH = –100 µA VDDQ = 2.5V 2.1 V
VDDQ = 1.8V 1.6 V
VOL1 Output LOW Voltage IOL = 1.0 mA VDDQ = 2.5V 0.4 V
VOL2 Output LOW Voltage IOL = 100 µA VDDQ = 2.5V 0.2 V
VDDQ = 1.8V 0.2 V
VIH Input HIGH Voltage VDDQ = 2.5V 1.7 VDD + 0.3 V
VDDQ = 1.8V 1.26 VDD + 0.3 V
VIL Input LOW Voltage VDDQ = 2.5V –0.3 0.7 V
VDDQ = 1.8V –0.3 0.36 V
IXInput Load Current GND < VIN < VDDQ –5 5 µA
Identification Register Definitions
Instruction Field CY7C1471V25
(2MX36)
CY7C1473V25
(4MX18)
CY7C1475V25
(1MX72) Description
Revision Number (31:29) 000 000 000 Describes th e version number
Device Depth (28:24) 01011 01011 01011 Reserved for internal use
Architecture/Memory Type(23:18) 001001 001001 001001 Defines memory type and architecture
Bus Width/Density(17:12) 100100 010100 110100 Defines width and density
Cypress JEDEC ID Code (11:1) 00000110100 00000110100 00000110100 Allows unique identification of SRAM
vendor
ID Register Presence Indicator (0) 1 1 1 Indicates the presence of an ID
register
Note
12.All voltages refer to VSS (GND).
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