Cypress CY7C1473V25, CY7C1471V25 manual Logic Block Diagram CY7C1475V25 1M x

CY7C1471V25

CY7C1473V25

CY7C1475V25

Logic Block Diagram – CY7C1475V25 (1M x 72)

A0, A1, A

ADDRESS

REGISTER 0

A1

A1'

D1

Q1

MODE

A0

D0

BURST Q0 A0'

ADV/LD

LOGIC

CLK

C

C

CEN

WRITE ADDRESS

WRITE ADDRESS

REGISTER 1

REGISTER 2

O

O

U

U

T

T

ADV/LD

S

P

D

P

E

U

A

U

BW a

N

T

T

T

MEMORY

S

R

A

B

BW b

WRITE

E

S

DQ s

ARRAY

E

U

BW c

WRITE REGISTRY

DRIVERS

A

G

T

F

DQ Pa

BW d

AND DATA COHERENCY

M

I

E

F

DQ Pb

P

S

E

E

BW e

CONTROL LOGIC

S

T

R

R

DQ Pc

BW f

E

I

S

DQ Pd

R

N

BW g

S

G

DQ Pe

E

E

BW h

DQ Pf

DQ Pg

DQ Ph

WE

INPUT

INPUT

E

REGISTER 1 E

REGISTER 0

OE

READ LOGIC

CE1

CE2

CE3

ZZ

Sleep Control

Document #: 38-05287 Rev. *I Page 3 of 32

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