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| CY7C604XX |
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ADC Electrical Specifications |
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Table 8. ADC Electrical Specifications |
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Symbol | Description | Min | Typ | Max | Units | Conditions | ||
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| Input Voltage Range | Vss |
| 1.3 | V | This gives 72% of maximum code | ||
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| Input Capacitance |
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| 5 | pF |
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| Resolution |
| 8 |
| Bits |
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| 23.4375 |
| ksps | Data Clock set to 6 MHz. Sample Rate | |||
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| = 0.001/(2^Resolution/Data clock) |
| DC Accuracy |
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| DNL |
| +2 | LSb | For any configuration | |||
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| INL |
| +2 | LSb | For any configuration | |||
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| Offset Error | 0 | 15 | 90 | mV |
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| Operating Current |
| 275 | 350 | μA |
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| Data Clock | 2.25 |
| 12 | MHz | Source is chip’s internal main oscillator. | ||
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| See AC Chip Level Specifications for |
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| accuracy. |
| Monotonicity |
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| Not guaranteed. See DNL | ||
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| Power Supply Rejection Ratio |
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| PSRR (Vdd>3.0V) |
| 24 |
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| PSRR (2.2 < Vdd < 3.0) |
| 30 |
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| PSRR (2.0 < Vdd < 2.2) |
| 12 |
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| PSRR (Vdd < 2.0) |
| 0 |
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| Gain Error | 1 |
| 5 | %FSR | For any resolution | ||
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| Input Resistance | 1/(500fF*D | 1/(400fF*D | 1/(300fF*D | Ω | Equivalent switched cap input resis- | ||
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| tance for |
Document Number: | Page 15 of 30 |
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