Cypress CY7C604XX Sink current on odd port pins for Example, P03 and P15, Input Low Voltage Vdd

CY7C604XX

Table 12. 1.71V to 2.4V DC GPIO Specifications

Symbol	Description	Conditions	Min	Typ	Max	Units
RPU	Pull Up Resistor		4	5.6	8	kΩ
VOH1	High Output Voltage	IOH = 10 μA, maximum of 10 mA	Vdd - 0.2	–	–	V
	Port 2 or 3 Pins	source current in all I/Os
VOH2	High Output Voltage	IOH = 0.5 mA, maximum of 10 mA	Vdd - 0.5	–	–	V
	Port 2 or 3 Pins	source current in all I/Os
VOH3	High Output Voltage	IOH = 100 μA, maximum of 10 mA	Vdd - 0.2	–	–	V
	Port 0 or 1 Pins with LDO Regulator	source current in all I/Os
	Disabled for Port 1
VOH4	High Output Voltage	IOH = 2 mA, maximum of 10 mA	Vdd - 0.5	–	–	V
	Port 0 or 1 Pins with LDO Regulator	source current in all I/Os
	Disabled for Port 1
VOL	Low Output Voltage	IOL = 5 mA, maximum of 20 mA sink	–	–	0.4	V
		current on even port pins (for
		example, P0[2] and P1[4]) and 30 mA
		sink current on odd port pins (for
		example, P0[3] and P1[5])
VIL	Input Low Voltage		–	–	0.3 x Vdd	V
VIH	Input High Voltage		0.65 x Vdd	–		V
VH	Input Hysteresis Voltage		–	80	–	mV
IIL	Input Leakage (Absolute Value)		–	0.001	1	µA
CPIN	Capacitive Load on Pins	Package and pin dependent.	0.5	1.7	5	pF
		Temp = 25oC

Document Number: 001-12395 Rev *H Page 19 of 30

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