Cypress CY8C23433, CY8C23533 manual Analog System Block Diagram

CY8C23433, CY8C23533

Analog System

The Analog system consists of an 8-bit SAR ADC and four configurable blocks. The programmable 8-bit SAR ADC is an optimized ADC that runs up to 300 Ksps, with monotonic guarantee. It also has the features to support a motor control application.

Each analog block consists of an opamp circuit allowing the creation of complex analog signal flows. Analog peripherals are very flexible and can be customized to support specific application requirements. Some of the more common PSoC analog functions (most available as user modules) are:

■Filters (2 band pass, low-pass)

■Amplifiers (up to 2, with selectable gain to 48x)

■Instrumentation amplifiers (1 with selectable gain to 93x)

■Comparators (1, with 16 selectable thresholds)

■DAC (6 or 9 -bit DAC)

■Multiplying DAC (6 or 9 -bit DAC)

■High current output drivers (two with 30 mA drive)

■1.3V reference (as a System Resource)

■DTMF dialer

■Modulators

■Correlators

■Peak detectors

■Many other topologies possible

Analog blocks are arranged in a column of three, which includes one CT (Continuous Time) and two SC (Switched Capacitor) blocks. The Analog Column 0 contains the SAR8 ADC block rather than the standard SC blocks.

Figure 2. Analog System Block Diagram

P0[7]			P0[6]
P0[5]			P0[4]
P0[3]			P0[2]
P0[1]			P0[0]
		RefIn	P2[6]
P2[3]
		AGNDIn
			P2[4]
P2[1]			P2[2]
			P2[0]
Array Input Configuration
ACI0[1:0]		ACI1[1:0]
	Block Array
	ACB00	ACB01
		ASD11
		ASC21
		P0[7:0]
	ACI2[3:0]
	8-Bit SAR ADC
		Analog Reference
Interface to	RefHi	Reference	AGNDIn
Digital System	RefLo	Generators	RefIn
	AGND		Bandgap

M8C Interface (Address Bus, Data Bus, Etc.)

Document Number: 001-44369 Rev. *B Page 3 of 37

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