CY8C23433, CY8C23533
28-Pin Part Pinout
Table 4. Pin Definitions - 28-Pin (SSOP)
Number | Name | Description |
Figure 6. CY8C23433 28-Pin PSoC Device
Pin CY8C23433 | Digital | Analog | Pin |
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1 | IO | I | P0[7] | Analog Column Mux IP and ADC IP |
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2 | IO | IO | P0[5] | Analog Column Mux IP and Column |
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| O/P and ADC IP |
3 | IO | IO | P0[3] | Analog Column Mux IP and Column |
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|
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| O/P and ADC IP |
4 | IO | I | P0[1] | Analog Column Mux IP and ADC IP |
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5 | IO |
| P2[7] | GPIO |
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6 | IO |
| P2[5] | GPIO |
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7 | IO | I | P2[3] | Direct Switched Capacitor Input |
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8 | IO | I | P2[1] | Direct Switched Capacitor Input |
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9 | IO | AVref | P3[0][5] | GPIO/ADC Vref (optional) |
10 | IO |
| P1[7] | I2C SCL |
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11 | IO |
| P1[5] | I2C SDA |
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12 | IO |
| P1[3] | GPIO |
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13 | IO |
| P1[1][6] | GPIO, Xtal Input, I2C SCL, ISSP SCL |
14 | Power | Vss | Ground Pin | |
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15 | IO |
| P1[0][6] | GPIO, Xtal Output, I2C SDA, ISSP |
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|
|
| SDA |
16 | IO |
| P1[2] | GPIO |
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17 | IO |
| P1[4] | GPIO, External Clock IP |
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18 | IO |
| P1[6] | GPIO |
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19 | IO |
| P3[1][7] | GPIO |
20 | IO | I | P2[0] | Direct Switched Capacitor Input |
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21 | IO | I | P2[2] | Direct Switched Capacitor Input |
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22 | IO |
| P2[4] | External Analog Ground (AGnd) |
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23 | IO |
| P2[6] | Analog Voltage Reference (VRef) |
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24 | IO | I | P0[0] | Analog Column Mux IP and ADC IP |
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25 | IO | I | P0[2] | Analog Column Mux IP and ADC IP |
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26 | IO | I | P0[4] | Analog Column Mux IP and ADC IP |
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27 | IO | I | P0[6] | Analog Column Mux IP and ADC IP |
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28 | Power | Vdd | Supply Voltage | |
LEGEND: A = Analog, I = Input, and O = Output.
AIO, P0[7] |
| 1 |
| 28 |
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|
IO, P0[5] |
| 2 |
| 27 |
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| |||
IO, P0[3] |
| 3 |
| 26 |
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AIO, P0[1] |
| 4 |
| 25 |
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IO, P2[7] |
| 5 |
| 24 |
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IO, P2[5] |
| 6 |
| 23 |
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AIO, P2[3] |
| 7 | SSOP | 22 |
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AIO, P2[1] |
| 8 | 21 |
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| |
AVref, IO, P3[0] |
| 9 |
| 20 |
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I2C SCL, IO, P1[7] |
| 10 |
| 19 |
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I2C SDA, IO, P1[5] |
| 11 |
| 18 |
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IO, P1[3] |
| 12 |
| 17 |
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I2C SCL,ISSP SCL,XTALin,IO, P1[1] |
| 13 |
| 16 |
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Vss |
| 14 |
| 15 |
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Vdd
P0[6], AIO, AnColMux and ADC IP P0[4], AIO, AnColMux and ADC IP P0[2], AIO, AnColMux and ADC IP P0[0], AIO, AnColMux and ADC IP P2[6], VREF
P2[4], AGND P2[2], AIO P2[0], AIO P3[1], IO P1[6], IO
P1[4], IO, EXTCLK P1[2], IO P1[0],IO,XTALout,ISSP SDA,I2C SDA
Notes
5.Even though P3[0] is an odd port, it resides on the left side of the pinout.
6.ISSP pin, which is not High Z at POR.
7.Even though P3[1] is an even port, it resides on the right side of the pinout.
Document Number: | Page 9 of 37 |
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