Cypress CY8C23533, CY8C23433 manual Pinouts, Pin Part Pinout, Scl, Issp-Sclk, Sda, Issp-Sdata, Xres

CY8C23433, CY8C23533

Pinouts

The PSoC CY8C23X33 is available in 32-pin QFN and 28-pin SSOP packages. Every port pin (labeled with a “P”), except for Vss and Vdd in the following table and figure, is capable of Digital IO.

32-Pin Part Pinout

Table 3. Pin Definitions - 32-Pin (QFN)

Pin	Type		Pin	Description
No.	Digital	Analog	Name
1	IO		P2[7]	GPIO
2	IO		P2[5]	GPIO
3	IO	I	P2[3]	Direct Switched Capacitor Block Input
4	IO	I	P2[1]	Direct Switched Capacitor Block Input
5	IO	AVref	P3[0][4]	GPIO/ADC Vref (optional)
6			NC	No Connection
7	IO		P1[7]	I2C Serial Clock (SCL)
8	IO		P1[5]	I2C Serial Data (SDA)
9			NC	No Connection
10	IO		P1[3]	GPIO
11	IO		P1[1]	GPIO, Crystal Input (XTALin), I2C Serial Clock
				(SCL), ISSP-SCLK*
12	Power		Vss	Ground Connection
13	IO		P1[0]	GPIO, Crystal Output (XTALout), I2C Serial Data
				(SDA), ISSP-SDATA*
14	IO		P1[2]	GPIO
15	IO		P1[4]	GPIO, External Clock IP
16			NC	No Connection
17	IO		P1[6]	GPIO
18	Input		XRES	Active High External Reset with Internal Pull Down
19	IO	I	P2[0]	Direct Switched Capacitor Block Input
20	IO	I	P2[2]	Direct Switched Capacitor Block Input
21	IO		P2[4]	External Analog Ground (AGnd)
22	IO		P2[6]	External Voltage Reference (VRef)
23	IO	I	P0[0]	Analog Column Mux Input and ADC Input
24	IO	I	P0[2]	Analog Column Mux Input and ADC Input
25			NC	No Connection
26	IO	I	P0[4]	Analog Column Mux Input and ADC Input
27	IO	I	P0[6]	Analog Column Mux Input and ADC Input
28	Power		Vdd	Supply Voltage
29	IO	I	P0[7]	Analog Column Mux Input and ADC Input
30	IO	IO	P0[5]	Analog Column Mux Input, Column Output and
				ADC Input
31	IO	IO	P0[3]	Analog Column Mux Input, Column Output and
				ADC Input
32	IO	I	P0[1]	Analog Column Mux Input.and ADC Input

LEGEND: A = Analog, I = Input, and O = Output.

Note

4. Even though P3[0] is an odd port, it resides on the left side of the pinout.

Figure 5. CY8C23533 32-Pin PSoC Device

		P0[1], A, I	P0[3], A, IO	P0[5], A, IO	P0[7], A, I	Vdd	P0[6], A, I	P0[4], A, I	NC
GPIO, P2[7]	1	32	31	30	29	28	27	26	25	P0[2], A, I
									24
GPIO, P2[5]	2								23	P0[0], A, I
A, I, P2[3]	3				QFN				22	P2[6], Vref
A, I, P2[1]	4								21	P2[4], AGnd
AVref, P3[0]	5			(Top View)					20	P2[2], A, I
NC	6								19	P2[0], A, I
I2C SCL, P1[7]	7								18	XRES
I2C SDA, P1[5]	8								17	P1[6], GPIO
		9	10	11	12	13 14		15	16
	NC		P1[3]	P1[1]	Vss	P1[0]	P1[2]	P1[4]	NC
			GPIO	I2C SCL, XTALin,		I2C SDA, XTALout,	GPIO	GPIO, EXTCLK,

Document Number: 001-44369 Rev. *B Page 8 of 37

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