Epson S5U1C62000A Instruction List (1) S1C6200 Core CPU Symbols in the Instruction List

Instruction List (1) S1C6200 Core CPUSymbols in the Instruction List

Registers/Register Data

A: Data register A or its contents (4 bits)

B: Data register B or its contents (4 bits)

X: Register XHL or its contents (8 low-order bits of the IX register)

XP: Register XP or its contents (4 high-order bits of the IX register)

XH: Register XH or its contents (4 high-order bits of the XHL register)

XL: Register XL or its contents (4 low-order bits of the XHL register)

Y: Register YHL or its contents (8 low-order bits of the IY register)

YP: Register YP or its contents (4 high-order bits of the IY register)

YH: Register YH or its contents (4 high-order bits of the YHL register)

YL: Register YL or its contents (4 low-order bits of the YHL register)

F: Flag register F or its contents (4 bits)

SP: Stack pointer SP or its contents (8 bits)

SPH: Stack pointer SPH or its contents (4 high-order bits of the stack pointer)

SPL: Stack pointer SPL or its contents (4 low-order bits of the stack pointer)

NBP: New bank pointer NBP or its contents (1 bit)

NPP: New page pointer NPP or its contents (4 bits)

PCB: Program counter bank PCB or its contents (1 bit)

PCP: Program counter page PCP or its contents (4 bits)

PCS: Program counter step PCS or its contents (8 bits)

PCSH: 4 high-order bits of PCS (4 bits)

PCSL: 4 low-order bits of PCS (4 bits)

Memory/Addresses/Memory Data

MX, M(X): Data memory addressed by IX or the contents of the specified memory

MY, M(Y): Data memory addressed by IY or the contents of the specified memory

Mn, M(n): Data memory addressed by n (n = 0 to 0xf) or the contents of the specified memory

M(SP): Stack addressed by SP or the contents of the stack address

Immediate Data

p: 5-bit immediate data or a label (0x0–0x1f)

s: 8-bit immediate data or a label (0x0–0xff)

l, x, y: 8-bit immediate data (0x0–0xff)

i: 4-bit immediate data (0x0–0xf)

n: 4-bit address for specifying Mn (0x0–0xf)

r, q: 2-bit immediate data for specifying a register or a data memory

Functions

←:Indicates that the right item is loaded or set to the left item.

+: Addition

-: Subtraction

&: AND

|: OR

^: XOR

!: NOT

Flags

Z: Zero flag

C: Carry flag

I: Interrupt flag

D: Decimal flag

–: Not changed

↔:Set (1), reset (0) or not changed

1: Set (1)

0: Reset (0)

★:Indicates that the instruction performs a decimal operation if the D flag is set.

Clk

Indicates the number of execution cycles.

specified