5.6 Timing
C141-E057-01EN 5-101
Table 5.16 Ultra DMA data burst timing requirements (2 of 2)
NAME
MODE 0
(in ns)
MODE 1
(in ns)
MODE 2
(in ns)
COMMENT
MIN MAX MIN MAX MIN MAX
t
RFS 75 60 50
Ready-to-final-STROBE time (no
STROBE edges shall be sent this long after
negation of DMARDY)
t
RP 160 125 100
Ready-to-pause time (that recipient shall
wait to initiate pause after negating
DMARDY-)
t
IORDYZ 20 20 20
Pull-up time before allowing IORDY to be
released
t
ZIORDY 000
Minimum time device shall wait before
driving IORDY
t
ACK 20 20 20
Setup and hold times for DMACK- (before
assertion or negation)
t
SS 50 50 50
Time from STROBE edge to negation of
DMARQ or assertion of STOP (when
sender terminates a burst)
Notes:
1) tUI, tMLI and tLI indicate sender -to-recipient or recipient-to-sender interlocks, that is, one agent
(either sender or recipient) is waiting for the other agent to respond with a signal before proceeding.
tUI is an unlimited interlock, that has no maximum time value. tMLI is a limited time-out that has a
defined minimum. t
LI
is a limited time-out, that has a defined maximum.
2) All timing parameters are measured at the connector of the device to which the parameter applies.
For example, the sender shall stop generating STROBE edges tRFS after the negation of DMARDY-.
Both STROBE and DMARDY- timing measurements are taken at the connector of the sender.
3) All timing measurement switching points (low to high and high to low) are to be taken at 1.5 V.