Interface

5.6.3 Multiword DMA data transfer

Figure 5.10 shows the multiword DMA data transfer timing between the device and the host system.

Delay time from DIOR-/DIOW- assertion to DMARQ negation

Figure 5.12 Multiword DMA data transfer timing (mode 2)

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C141-E057-01EN

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Fujitsu MHE2043AT, MHF2043AT, MHF2021AT, MHE2064AT manual Multiword DMA data transfer timing mode