At command issuance (I/O registers setting contents)
1F7H(CM) | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | ||
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1F6H(DH) | × | L |
| × | DV |
| Max head/LBA [MSB] | |||
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1F5H(CH) |
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| Max. cylinder [MSB]/Max. LBA |
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1F4H(CL) |
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| Max. cylinder [LSB]/Max. LBA |
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1F3H(SN) |
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| Max. sector/Max. LBA [LSB] |
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1F2H(SC) |
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| xx |
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| VV |
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1F1H(FR) |
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| xx |
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At command completion (I/O registers contents to be read)
1F7H(ST) |
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| Status information | |||
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1F6H(DH) | × | × |
| × |
| DV |
| Max head/LBA [MSB] |
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1F5H(CH) |
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| Max. cylinder [MSB]/Max. LBA | |||||
1F4H(CL) |
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| Max. cylinder [LSB]/Max. LBA | |||||
1F3H(SN) |
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| Max. sector/Max. LBA [LSB] | |||||
1F2H(SC) |
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| xx | |
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1F1H(ER) |
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| Error information | |||
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(37)READ NATIVE MAX ADDRESS (F8)
This command posts the maximum address intrinsic to the device, which can be set by the SET MAX ADDRESS command. Upon receipt of this command, the device sets the BSY bit and indicates the maximum address in the DH, CH, CL and SN registers. Then, it clears BSY and generates an interrupt.
At command issuance (I/O registers setting contents)
1F7H(CM) | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | |
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1F6H(DH) | × | L | × | DV |
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| xx |
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1F5H(CH) |
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| xx |
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1F4H(CL) |
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| xx |
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1F3H(SN) |
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| xx |
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1F2H(SC) |
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| xx |
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1F1H(FR) |
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| xx |
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