CHAPTER 6: Troubleshooting

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Bootblock initialization code checkpoints

The Bootblock initialization code sets up the chipset, memory, and other components before system memory is available. The following table provides the diagnostic LED code for these checkpoints and describes the type of checkpoints that may occur during the bootblock initialization:

Check

Description

point

 

 

 

Before

Early chipset initialization is done. Early super I/O initialization is done,

D1h

including RTC and keyboard controller. NMI is disabled.

 

 

D1

Perform keyboard controller BAT test. Check if waking up from power

 

management suspend state. Save power-on CPUID value in scratch CMOS.

 

 

D0

Go to flat mode with 4 GB limit and GA20 enabled. Verify the bootblock

 

checksum.

 

 

D2

Disable CACHE before memory detection. Execute full memory sizing

 

module. Verify that flat mode is enabled.

 

 

D3

If memory sizing module not executed, start memory refresh and do

 

memory sizing in Bootblock code. Do additional chipset initialization.

 

Re-enable CACHE. Verify that flat mode is enabled.

 

 

D4

Test base 512 KB memory. Adjust policies and cache first 8 MB. Set stack.

 

 

D5

Bootblock code is copied from ROM to lower system memory and control

 

is given to it. BIOS now executes out of RAM.

 

 

D6

Both key sequence and OEM-specific method is checked to determine if

 

BIOS recovery is forced. Main BIOS checksum is tested. If BIOS recovery is

 

necessary, control flows to checkpoint E0. See Bootblock Recovery Code

 

Checkpoints section of document for more information.

 

 

D7

Restore CPUID value back into register. The Bootblock-Runtime interface

 

module is moved to system memory and control is given to it. Determine

 

whether to execute serial flash.

 

 

D8

The Runtime module is uncompressed into memory. CPUID information is

 

stored in memory.

 

 

D9

Store the Uncompressed pointer for future use in PMM. Copying Main BIOS

 

into memory. Leaves all RAM below 1 MB Read-Write, including E000 and

 

F000 shadow areas, but closing SMRAM.

 

 

DA

Restore CPUID value back into register. Give control to BIOS POST

 

(ExecutePOSTKernel). See “POST code checkpoints” on page 83 for more

 

information.

 

 

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