IBM P5 570 manual Architecture and technical overview, 1 p5-570logic data flow

2

Chapter 2. Architecture and technical overview

This chapter discusses the overall system architecture represented by Figure 2-1,with its major components described in the following sections. The bandwidths that are provided throughout the section are theoretical maximums used for reference. You should always obtain real-world performance measurements using production workloads.

Two HMC Two SPCN Two serial

Two Eth

Two USB

Eth ports

ports

ports

operator panel

PCI-X slot #6

#5 #4 #3

#2 #1

ports

ports

133 MHz

CUoD key card

interface card

Dual 1 GB

USB

Ethernet

Serial

RIO-2 bus

2 B (Diff'l) each dir

133 MHz

66 MHz

1 GB/sec

FSP

PCI-X to PCI-X

PCI-X to PCI-X

PCI-X to PCI-X

133 MHz

133 MHz

RIO-2 expansion

bridge 1

bridge 2

bridge 0

RIO-2 bus

card

2 B (Diff'l) each dir

1 GB/sec

Dual SCSI

Enterprise

Enterprise

RIO-2 bus

PCI-X Host

IDE

Ultra320

RIO HUB

RIO HUB

2 B (Diff'l) each dir

controller

bridge

1 GB/sec

GX+ bus

GX+ bus

RAID

Dual SCSI

3 (Proc Clk):1

2 (Proc Clk):1

3 (Proc Clk):1

Ultra320

enablement

4 Bytes each dir

8 Bytes each dir

4 Bytes each dir

card

Elastic Intfc

Elastic Intfc

Elastic Intfc

DCM

DCM

Vertical Fabric

slim-line media device

core

core

core

core

slim-line media device

bus

shared L2 cache

L3

shared L2 cache

L3

optional media backplane

POWER5

cache

POWER5

cache

memory

memory

distributed switch

controller

distributed switch

controller

SCSI-IDE

SMI-II

SMI-II

SMI-II

SMI-II

conv

D D D D

D D D D

D D D D

D D D D

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

6-pack disk drive backplane

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

M

2 (Proc Clk):1

SMP flex interconnect cable (SMP Fabric bus)

8 Bytes each dir

Elastic Intfc

Figure 2-1 p5-570 logic data flow

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