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Intel GENE-8310 manual Programming the Watchdog Timer, Appendix, SubCompact Board, G E N E - 8 3 1

Models: GENE-8310

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SubCompact Board	G E N E - 8 3 1 0

Appendix

Programming the

Watchdog Timer

Appendix A Programming the Watchdog Timer A-1

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Intel GENE-8310 manual Programming the Watchdog Timer, Appendix, SubCompact Board, G E N E - 8 3 1

Contents

Intel Celeron M Processor Subcompact Board With LVDS, Ethernet GENE-83106 Channel Audio & Mini PCI SubCompact BoardCopyright Notice Acknowledgments Packing List Contents Chapter 2 Quick Installation GuideChapter 1 General Information Chapter 3 Award BIOS Setup Chapter 4 Driver InstallationAppendix A Programming The Watchdog Timer I/O Information Appendix BIRQ Mapping Chart SubCompact BoardG E N E - 8 3 1Chapter General InformationSubCompact Board G E N E - 8 3 11.1 Introduction Superb Performance and Controllable Power UsageMultiple Display Modes Chapter 1 General InformationWide Expansion Capability 48-bit Dual Channels LVDS TFT LCD 10/100Mbps Fast Ethernet 1.2 FeaturesAC-97 3D Surround 5.1 Channel Audio Supports Type II CompactFlash MemorySystem 1.3 SpecificationsDisplay 4 USB 2.0 Ports Does not Two 5 x 2 Pin Headers Supportsupport Wake-up function SubCompact BoardChapter 2 Quick Installation Guide Quick Installation GuideChapter SubCompact Board2.1 Safety Precautions Chapter 2 Quick Installation Guide 2.2 Location of Connectors and Jumpers Component SideSubCompact Board G E N E - 8 3 1Chapter 2 Quick Installation Guide Solder SideSubCompact Board G E N E - 8 3 1Component Side 2.3 Mechanical DrawingChapter 2 Quick Installation Guide SubCompact BoardSolder Side Chapter 2 Quick Installation GuideSubCompact Board G E N E - 8 3 12.4 List of Jumpers JumpersChapter 2 Quick Installation Guide SubCompact Board2.5 List of Connectors ConnectorsCN17 Open 2.6 Setting JumpersClosed Closed2.7 Clear CMOS Selection JP1 2.10 USB2.0 Port 1 Connector CN12.8 LCD Voltage Selection JP2 2.9 COM2 RI/+5V Selection JP52.12 Primary IDE Hard Drive Connector CN3 2.11 USB2.0 Port 2 Connector CN2Signal SignalDIO Address is 801H 2.13 Digital IO Connector CN4SubCompact Board G E N E - 8 3 12.14 Front Panel CN5 2.15 Serial Port COM2 Connector CN6Signal SignalSignal 2.16 Parallel Port Connector CN7Signal Signal2.18 4P Power Connector CN9 2.17 Dual Channel LVDS Connector CN8Signal Signal2.20 DVI Connector CN11 2.19 TV-Out Connector CN102.21 Audio Input/Output Connector CN12 Signal2.23 External 5VSB/PWRGD Connector CN14 2.22 Ethernet 10/100Base-TX RJ-45 Phone Jack Connector CN132.24 IrDA Connector CN15 Signal2.26 Mini-DIN PS/2 Connector CN17 2.25 Fan Connector CN162.27 Serial Port COM1 Connector CN18 PinSignal2.29 External Battery VBAT2 2.28 CRT Display Connector CN192.30 Mini PCI Slot MPCI1 2.31 CompactFlash Disk Slot CFD1G E N E - 8 3 1 SubCompact BoardChapter 3 Award BIOS Setup Award BIOS SetupChapter SubCompact Board3.1 System Test and Initialization System configuration verificationStandard CMOS Features Entering SetupAdvanced BIOS Features Advanced Chipset FeaturesPnP/PCI Configurations Power Management SetupLoad Fail-Safe Defaults Load Optimized DefaultsSet Supervisor/User Password Save and Exit SetupExit Without Saving Chapter 4 Driver Installation Driver InstallationChapter SubCompact BoardFollow the sequence below to install the drivers Chapter4 Drivers Installation 4.1 InstallationStep 4 - Install Realtek AC97 codec Driver Appendix Programming the Watchdog TimerAppendix A Programming the Watchdog Timer A-1 SubCompact BoardConfiguring Sequence Description A.1 ProgrammingAppendix A Programming the Watchdog Timer A-2 1 Enter the MB PnP Mode 3 Exit the MB PnP Mode2 Modify the Data of the Registers WatchDog Timer Configuration Registers Configure Control Index=02hAppendix A Programming the Watchdog Timer A-4 SubCompact BoardWatchDog Timer Configuration Register Index=72h, Default=00h WatchDog Timer Control Register Index=71h, Default=00hWatchDog Timer Time-out Value Register Index=73h, Default=00h Appendix A Programming the Watchdog Timer A-5A.2 ITE8712 Watchdog Timer Initial Program game port enable mov cl call SetLogicDevice InitialOK CALL ReadConfigurationData CMP AL,87h JNE NotInitial MOV AL,21h RET ExitConfigurationMode ENDP CheckChip PROC NEAR MOV AL,20hCALL ReadConfigurationData CMP AL,12h JNE NotInitial NeedInitial STC RET NotInitial CLC RET CheckChip ENDP ReadConfigurationData PROC NEARMOV DX,WORD PTR CSCfgPort+06h IN AL,DX RET ReadConfigurationData ENDP Appendix A Programming the Watchdog Timer A-10 END MainSetLogicDevice proc near push ax push cx xchg al,cl mov cl,07h call SuperioSetReg pop cx pop ax ret SetLogicDevice endpAppendix I/O InformationSubCompact Board G E N E - 8 3 1B.2 1st MB Memory Address Map B.1 I/O Address MapSubCompact BoardG E N E - 8 3 1 Appendix B I/O Information B-2B.4 DMA Channel Assignments B.3 IRQ Mapping ChartSubCompact BoardG E N E - 8 3 1 Appendix B I/O Informaion B-3