Intel GENE-8310 manual A.1 Programming, Configuring Sequence Description

SubCompact Board G E N E - 8 3 1 0

A.1 Programming

GENE-8310 utilizes ITE 8712 chipset as its watchdog timer controller. Below are the procedures to complete its configuration and the AAEON intial watchdog timer program is also attached based on which you can develop customized program to fit your application.

Configuring Sequence Description

After the hardware reset or power-on reset, the ITE 8712 enters the normal mode with all logical devices disabled except KBC. The initial state (enable bit ) of this logical device (KBC) is determined by the state of pin 121 (DTR1#) at the falling edge of the system reset during power-on reset.

There are three steps to complete the configuration setup: (1) Enter the MB PnP Mode; (2) Modify the data of configuration registers; (3) Exit the MB PnP Mode. Undesired result may

Appendix A Programming the Watchdog Timer A-2