Intel ZT 4901 10.1.5 Slot Control Interf a c e

High Availability Software for the Intel® NetStructureTM ZT 4901 Technical Product Specification 101

Demonstration Utilities

•Slot state flags

If the slot is not empty, the following fields are also present:

•Vendor ID

•Device ID

•Subsystem vendor ID

•Subsystem ID

•Revision ID

•Class, subclass, programming interface

•Header type

•HS-CSR, if any

10.1.4.3 Slot State

When the slot information structure is filled in as a result of a call, the HsStateFlags field contains

a set of flags representing the current state of the slot. The following flags are defined:

10.1.5 Slot Control Interf a c e

Slot control capability is defined in the Redundant Host System Model, where the capabilities of

the system are extended to allow software control of a board’s hardware connection state.

The system software adds drivers and services for this greater degree of control. This allows

software to electrically isolate the board from the system until an operator is available to do so

physically.

•Slot control enables:

•Capability to perform reset on the board

•Change the board’s power state to ON

•Checks the presence and health of the board

Table 5. Slot State Flags

Flags Meanings

HS_STATE_DEVICE_PRESENT A device is present in the slot

HS_STATE_SW_CONNECTED A device is present in the slot and software connected

HS_STATE_EXTRACTION_PENDING Extraction request pending for the device in the slot

HS_STATE_READY_FOR_EXTRACTION Device is ready for extraction, the blue LED is lit

Contents

Main Page Contents Page Page Figures Tables Page Page Document Organization 1 Page Introduction 2 2.1 Terminology Page Page 2.2 High Availability Hardware Approach 2.2.1 Processor Boards 2.2.2 Bridge Mezzanine 2.2.3 Backplane 2.3 High-Availability Software Approach 2.3.1 Host Application 2.3.2 System Management 2.3.3 Backplane Device Drivers Host Application Software 3 3.1 Goals of the Host Application 3.1.1 Serviceability 3.1.2 Portability 3.2 Division of Labor 3.3 Development Issues 3.3.1 Redundancy 3.3.2 Graceful Switchover 3.3.3 Hardened Applications 3.3.4 Code Modularity System Management 4 4.1 Redundant Host API 4.1.1 IPMI API 4.1.2 Hot Swap API 4.2 Baseboard Management Controller Firmware Enhancements 4.2.1 Fault Configuration 4.2.2 Isolation Strategies 4.2.3 IPMI RH Channel Commands 4.2.3.1 RH Channel Enabled 4.2.3.2 RH Channel Get RH BMC Address Page Page High Availability CompactPCI Device Drivers 5 5.1 Device Driver Design 5.1.1 Device Driver States 5.1.2 Adding High-Availability Functionality Driver Not Loaded Device Suspended Device Running Device Not Present 5.1.2.1 Add Device 5.1.2.2 Resume Operations 5.1.2.3 Suspend Operations 5.1.2.4 Remove Device 5.1.2.5 Driver Synchronization 5.2 Summary Redundant Host API 6 6.1 Intel-Specific APIs 6.1.1 RhSetHostName 6.1.1.1 RhGetHwDestinationHostAndReset 6.2 Redundant Host PICMG* 2.12 APIs 6.2.1 Definitions and Types Page Redundant Host API 6.2.2 Initialization/Termination 6.2.2.1 RhEnumerateInstances 6.2.2.2 RhOpen 6.2.2.3 RhClose 6.2.2.4 RhGetInstanceID 6.2.3 Domain and Host Information API 6.2.3.1 RhGetDomainCount 6.2.3.2 RhGetDomainNumbers 6.2.3.3 RhGetDomainOwnership 6.2.3.4 RhGetDomainSlotPath Page 6.2.3.5 RhGetDomainSlotCount 6.2.3.6 RhGetDomainSlots 6.2.3.7 RhGetSlotDomain 6.2.3.8 RhGetCurrentHostNumber 6.2.3.9 RhGetHostCount 6.2.3.10 RhGetHostNumbers 6.2.3.11 RhGetHostName 6.2.3.12 RhSetHostAvailability 6.2.3.13 RhGetHostAvailability 6.2.3.14 RhGetDomainAvailabilityToHost 6.2.4 Slot Information API 6.2.4.1 RhGetPhysicalSlotInformation Page 6.2.4.2 RhGetSlotChildInformation Page 6.2.5 Switchover API 6.2.5.1 Switchover Scenarios and Theory of Operation 6.2.5.1.1 Fully Cooperative Switchover 6.2.5.1.2 Partially Cooperative Switchover 6.2.5.1.3 Forced Switchover 6.2.5.1.4 Hostile Switchover 6.2.5.1.5 Hardware-Initiated Switchover 6.2.5.2 RhPrepareForSwitchover Page 6.2.5.3 RhCancelPrepareForSwitchover 6.2.5.4 RhGetDomainSwConnectionStatus 6.2.5.5 RhGetSlotSwConnectionStatus 6.2.5.6 RhPerformSwitchover 6.2.5.7 RhSetHwDestinationHost Page 6.2.5.8 RhGetHwDestinationHost 6.2.6 Notification, Reporting and Alarms 6.2.6.1 RhEnableDomainStateNotification 6.2.6.2 RhEnableSwitchoverNotification 6.2.6.3 RhEnableSwitchoverRequestNotification 6.2.6.4 RhEnableUnsafeSwitchoverNotification Page 6.2.6.5 RhDisableNotification Page Hot Swap API 7 Page IPMI API 8 8.1 imbOpenDriver 8.2 imbCloseDriver 8.3 imbDeviceIoControl 8.4 imbSendTimedI2cRequest 8.5 imbSendIpmiRequest 8.6 imbGetAsyncMessage 8.7 imbIsAsyncMessageAvailable 8.8 imbRegisterForAsyncMsgNotification 8.9 imbUnregisterForAsyncMsgNotification 8.10 imbGetLocalBmcAddr 8.11 imbSetLocalBmcAddr 8.12 imbGetIpmiVersion Slot Control API 9 9.1 HsiOpenSlotControl 9.2 HsiCloseSlotControl 9.3 HsiGetSlotCount 9.4 HsiGetBoardPresent 9.5 HsiGetBoardHealthy 9.6 HsiGetSlotPower 9.7 HsiSetSlotPower 9.8 HsiGetSlotReset 9.9 HsiSetSlotReset 9.10 HsiGetSlotM66Enable 9.11 HsiSetSlotM66Enable 9.12 HsiSetSlotEventCallback Page Demonstration Utilities 10 10.1 Functional Description 10.1.1 User Interface 10.1.2 RH Interface 10.1.2.1 Software Initiated Handovers Page 10.1.3 IPMI Interface 10.1.4 Hot Swap Interface 10.1.4.1 HS Functional Description 10.1.4.1.1 Hot Swap Board Insertion 10.1.4.1.2 Hot Swap Board Extraction 10.1.4.1.3 Slot Information Retrieval Page 10.1.5 Slot Control Interf a c e Page Software Installation A A.1 Linux A.2 Installing the Redundant Host Software Kit A.3 Installing RH Source RPM A.3.1 Source Installation A.3.2 Patching and Rebuilding an RH-Enabled Kernel A.3.3 Patching Linux with Kernel <kernel-version> A.3.4 Making RH Configuration Changes A.4 Configuring the Redundant Host Infrastructure A.4.1 /lib/modules/priBptd.o A.4.2 /lib/modules/slotcntrl.o BUILD/CompactPCI-RH-1.0/ BpTestDrv Backplane driver (see /lib/modules/misc/priBptd.o) A.5 VxWorks (Tornado II Setup) Redundant Host Function Return Values B Page Page Page Page Page HSK Device Driver Interface for VxWorks* 5.4 C C.1 HSK Driver Object Declaration C.2 HSK Device Information Structure HSK Device Driver Interface for VxWorks* 5.4 C.3 HSK Driver Instantiation Code Segment C.4 Redundant Host-Aware Callback Definitions C.4.1 PRH_DEVICE_OBJ AddDevice C.4.2 HSI_STATUS StartDevice C.4.3 HSI_STATUS StopDevice C.4.4 HSI_STATUS RemoveDevice C.4.5 HSI_STATUS SurpriseRemoval C.5 RH-Aware Message Registration Definitions C.5.1 HSI_STATUS rhHskRegisterMsgCallback C.5.2 int rhHskUnregisterMsgCallback C.6 Process Packet Callback Definition C.6.1 RH_HSK_RH_PROCESS_PACKET C.7 RH-Aware Send Message Definition C.7.1 HSI_STATUS rhHskSendMessage C.8 Alternate HS_CSR Interfaces Page Page Design Guideline for Peripheral VendorsE E.1 Non Bus Mastering Peripheral E.2 Bus Mastering (DMA Capable) Peripheral E.3 Support for Unmodified Standard Drivers Page Porting ZT 5550 HA Applications to PICMG 2.12 F Porting ZT 5550 HA Applications to PICMG 2.12 HAGetEthernetRo uting, HASetEthernetRou ting RH Switchover on OS Crash G Page Data Sheet Reference H Page Index