Contents

 

Figures

 

1

High-Availability CPU Architecture

11

2

RSS Processor Board Block Diagram

16

3

RSS Host with Bridge Mezzanine Block Diagram

17

4

High-Availability System Backplane Architecture

18

5

Layered Host Application Diagram

22

6

Multi-Stated Driver Flowchart

33

Tables

 

1

Channel Definitions for ZT 5524

27

2

RH Channel Alert Destinations

28

3

PCI Tree Information Retrieval Flags

100

4

Events that Generate Notification Messages

100

5

Slot State Flags

101

6

High Availability Software for the Intel® NetStructureTM ZT 4901 Technical Product Specification

Page 6
Image 6
Intel ZT 4901 manual Figures, Tables