Design Guideline for Peripheral VendorsE
The following topics present guidelines for designing a device driver for use in the Intel NetStructure Redundant Host environment.
E.1 Non Bus Mastering Peripheral
Peripheral devices that are not masters p resent no complications for a Redundant Host environment. These devices do not perform data writes into System Master memory. They only request the System Master to read data from the device.
Use of the synchronization mechanism provided allows the System Masters to maintain state information. The domain owner should ensure its standby/backup checkpoints any necessary data before clearing it from the peripheral device. If a catastrophic failure occurs before successful checkpointing of important data, the standby/backup can recover the data from the peripheral device itself and continue operation without data loss.
E.2 Bus Mastering (DMA Capable) Peripheral
It is very important to data coherency that peripheral devices that perform DMA transactions into System Master memory ensure the data is received and processed by the System Master before reusing its local buffer. This allows the domain owner to checkpoint the data to the backup/standby before acknowledging the transaction. If a catastrophic failure occurs before successful checkpointing of important data, the standby/backup is able to recover the data from the peripheral device itself and continue operation without data loss.
It is also important to note that during a failover from one domain owner to another, buffers on these SBCs are guaranteed not to be in the same physical location unless the device drivers manage this action. In the event of different physical buffer address locations, the device driver is required to
E.3 Support for Unmodified Standard Drivers
In order for a Redundant Host CompactPCI architecture to provide
High Availability Software for the Intel® NetStructureTM ZT 4901 Technical Product Specification | 125 |