FIGURE B.2,
PORT 0: Bit 0 is also high- speed counter input.
PORT 0
PORT 1
DI0 | DI4 | AGND | AGND |
DI1 | DI5 | AI8 | AI0 |
DI2 | DI6 | AI9 | AI1 |
DI3 | DI7 | AI10 | AI2 |
DGND | DGND | AI11 | AI3 |
DO0 | DO4 | AGND | AGND |
DO1 | D05 | AI12 | AI4 |
DO2 | DO6 | AI13 | AI5 |
DO3 | DO7 | AI14 | AI6 |
DGND | CTRCLK | AI15 | AI7 |
AIRG | CTRGATE | AGND | AGND |
EXTIN | CTROUT | AO1 | AO0 |
PORTs 0 and 1 on the
The CTRCLK, CTRGATE, and CTROUT terminations are not used (N/C) on the EDAS-