Chapter 1 - Introduction

Conventions

This section details many of the writing conventions used throughout the manual. In addition, it gives many of the technical conventions.

•The V/Ethernet 4221 Condor will be referred to by the name Condor or referenced as the controller.

•Byte represents 8 bits; word represents 16 bits (2 bytes); and longword represents 32 bits (2 words, 4 bytes).

•Binary (single bit) data is represented as either 1 or 0.

•To represent hexadecimal numbers, the manual adopts the C language notation. Decimal numbers are shown as decimal digits. For example:

0x29 = 29 hex

41 = 41 decimal

•Used in the context of a single bit of data, the term set means that the bit is a one ("1").

•Similarly, the term cleared means that the bit is a zero ("0").

•In many cases, bits, bytes, and words are marked RESERVED. If the value of the reserved bit, byte, or word is sent to the controller by the host, the value must be cleared to 0.

•If the reserved value is returned by the controller, it is reserved for future use by Interphase. The user should not rely on these values to be consistent through different revisions of the product.

General Description

The Condor is the second-generation multi-channel multi-function I/O Host Bus Adapter (HBA) for the VMEbus in the Cougar product line. The board is designed to maintain scalable performance and cost. The Condor architecture can be implemented with up to four Front End Channels (FECs). The FECs interface directly to a local bus, which contains a large memory buffer and a VMEbus DMA engine. This board also contains a CPU core with its own memory area and host bus interface.

Features

The basic functions and features supported by the Condor are as follows:

•Dual Ethernet Channel (10baseT or AUI) on the Motherboard.

•Dual Ethernet Channel (10baseT or AUI) on the Daughter Card.

•8-, 16-, 32- and 64-bit VMEbus Master DMA capability.

•25 Mbytes/second master mode burst/sustained D32 transfer rate across the VMEbus (in some modes).

•50 Mbytes/second master mode burst/sustained D64 transfer rate across the VMEbus (in some modes).

•Programmable VME/interrupt levels and vectors.

•16-bit, 24-bit, and 32-bit VMEbus DMA addressing, and all addressing modifiers.

•Software programmable VMEbus priority levels.

•Two VMEbus configurable 2K byte short I/O access areas of 8-bit, 16-bit, and 32-bit Slave mode transfers.

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