
Master Control Status Block (MCSB)
Master Control Status Block (MCSB)
The MCSB consists of a Master Status Register, which is used to report information from the controller to the host, and the Master Control Register, which provides infrequently used control functions to the host.
Table
Master Control/Status Block
Addr | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 |
| 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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0x000 |
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| Master Status Register |
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0x002 |
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| Reserved |
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0x004 |
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| Master Control Register |
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0x006 |
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| Reserved |
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0x00F |
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The MSR reports to the host whether the controller is functional or not. Two bits are used.
Table
Master Status Register
Addr | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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0x000 |
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| BOK | CNA |
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Controller not available (CNA)
This bit is set to 1 by the controller to indicate that it is not available for receipt of a command. This condition can be caused by a controller reset.
NOTE: On the V/Ethernet 4207 Eagle, the controller was defined to be available when this bit is 0. On the 4221 Condor, controller available is signalled by the presence of Board OK.
Board OK (BOK)
If 1, this bit indicates the controller has passed power up diagnostics, and is ready to accept commands.
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