
System Interface
System Interface
This section defines how the host communicates with the controller. The shared memory interface is defined, and each major section described in detail. Full definitions for particular commands (what is communicated) can be found in a following section.
MACSI Organization
Ethernet MACSI for the Condor consists of eight major sections, as illustrated in the following memory map:
Table
MACSI Memory Map
Addr | 15 | 14 | 13 | 12 | 11 | 10 |
| 9 |
| 8 | 7 |
| 6 |
| 5 | 4 |
| 3 | 2 | 1 | 0 |
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0x000 |
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| Master Control Status Block |
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0x00F |
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0x010 |
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| Master Command Queue Entry |
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| (12 Bytes) |
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0x01B |
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0x01C |
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| Command Queue Entries |
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| (12 Bytes * N) |
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0xXXX |
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0xXXX |
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| Onboard IOPBs (optional) |
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| (1812 - 12N Bytes) |
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0x72F |
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0x730 |
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| Command Response Block |
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0x73F |
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0x740 |
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| Returned IOPB / Multiple Completion Return |
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| (36 Bytes) |
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0x763 |
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0x764 |
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| Configuration Status Block / Multiple Completion Return |
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0x7AB |
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0x7AC |
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| Controller Statistics Block / Multiple Completion Return |
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| (84 Bytes) |
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0x7FF |
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The Master Control/Status Block (MCSB) is used to pass and receive information relating to the overall functioning of the controller.
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