Chapter 3 - MACSI Host Interface

Controller Statistics Block

Addr

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0x7CC

toReceive 82596 Completions 0x7CF

0x7D0

toSuccessful Receives 0x7D3

0x7D4

toFailed Receives 0x7D7

0x7D8

toReceive DMA Completions 0x7DB

0x7DC

toReceive Completions Posted to Host 0x7DF

0x7E0

toReserved 0x7FC

Transmit Commands Submitted

Total number of attempted frame transmissions (successful and unsuccessful).

Transmit DMA Completions

Total number of DMA transfers completed as the result of a transmit command.

Transmit 82596 Completions

Total number of frames that the Intel 82596 Ethernet chip has transmitted.

Successful Transmits

Total number of frames successfully transmitted.

Failed Transmits

Total number of unsuccessful frame transmissions.

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