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CHAPTER 5 PERIPHERAL HARDWARE FUNCTIONS
(2) Serial bus interface control register (SBIC)
Figure 5-41 shows the format of the serial bus interface control register (SBIC).
SBIC is an 8-bit register consisting of bits for controlling the serial bus and flags for indicating the states
of input data from the serial bus. SBIC is used mainly in the SBI mode.
SBIC is manipulated using a bit manipulation instruction. SBIC cannot be manipulated using a 4-bit or
8-bit memory manipulation instruction.
Each bit may or may not allow read and/or write operation (Figure 5-41).
When the RESET signal is generated, all bits are cleared to 0.
Caution Only the following bits can be used in the three-wire and two-wire serial I/O modes:
• Bus release trigger bit (RELT): Sets the SO latch.
• Command trigger bit (CMDT): Clears the SO latch
.
Figure 5-41. Format of Serial Bus Interface Control Register (SBIC) (1/3)
Remarks 1. (R: Read only
2. (W): Write only
3. (R/W): Read/write
BSYE ACKD ACKE ACKT CMDD CMDTRELD RELT
76543 120
Address
SBIC
Symbol
Bus release trigger bit (W)
FE2H
Command trigger bit (W)
Bus release detection flag (R)
Command detection flag (R)
Acknowledge trigger bit (W)
Acknowledge enable bit (R/W)
Acknowledge detection flag (R)
Busy enable bit (R/W)