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APPENDIX D INSTRUCTION INDEX
D.1 INSTRUCTION INDEX (BY FUNCTION)
[Transfer instructions]
MOV A,#n4 ... 245, 264
MOV reg1,#n4 ... 245, 265
MOV XA,#n8 ... 245, 265
MOV HL,#n8 ... 245, 265
MOV rp2,#n8 ... 245, 265
MOV A,@HL ... 245, 265
MOV A,@HL+ ... 245, 265
MOV A,@HL– ... 245, 265
MOV A,@rpa1 ... 245, 265
MOV XA,@HL ... 245, 266
MOV @HL,A ... 245, 266
MOV @HL,XA ... 245, 266
MOV A,mem ... 245, 266
MOV XA,mem ... 245, 267
MOV mem,A ... 245, 267
MOV mem,XA ... 245, 267
MOV A,reg ... 245, 267
MOV XA,rp’ ... 245, 267
MOV reg1,A ... 245, 268
MOV rp’1,XA ... 245, 268
XCH A,@HL ... 245, 268
XCH A,@HL+ ... 245, 268
XCH A,@HL– ... 245, 268
XCH A,@rpa1 ... 245, 268
XCH XA,@HL ... 245, 269
XCH A,mem ... 245, 269
XCH XA,mem ... 245, 269
XCH A,reg1 ... 245, 269
XCH XA,rp’ ... 245, 269
[Table reference instructions]
MOVT XA,@PCDE ... 246, 270
MOVT XA,@PCXA ... 246, 271
MOVT XA,@BCDE ... 246, 272
MOVT XA,@BCXA ... 246, 272
[Bit transfer instructions]
MOV1 CY,fmem.bit ... 246, 273
MOV1 CY,pmem.@L ... 246, 273
MOV1 CY,@H+mem.bit ... 246, 273
MOV1 fmem.bit,CY ... 246, 273
MOV1 pmem.@L,CY ... 246, 273
MOV1 @H+mem.bit,CY ... 246, 273
[Arithmetic/logical instructions]
ADDS A,#n4 ... 246, 273
ADDS XA,#n8 ... 246, 274
ADDS A,@HL ... 246, 274
ADDS XA,rp’ ... 246, 274
ADDS rp’1,XA ... 246, 274
ADDC A,@HL ... 246, 274
ADDC XA,rp’ ... 246, 275
ADDC rp’1,XA ... 246, 275
SUBS A,@HL ... 246, 275
SUBS XA,rp’ ... 246, 275
SUBS rp’1,XA ... 246, 276
SUBC A,@HL ... 246, 276
SUBC XA,rp’ ... 246, 276
SUBC rp’1,XA ... 246, 276
AND A,#n4 ... 247, 276
AND A,@HL ... 247, 277
AND XA,rp’ ... 247, 277
AND rp’1,XA ... 247, 277
OR A,#n4 ... 247, 277

D