250
µPD750008 USER'S MANUAL
Branch
Note 1. Set register B to 0.2. Only the LSB is valid in register B.3. Only the low-order two bits are valid in register B.
In Mne-
Number Machine
Address-
struc- monic Operand of cycle Operation ing Skip condition
tion bytes area
BR !addr 3 3 µPD750004 *6
PC
11-0
<– addr
µPD750006, µPD750008
PC
12-0
<– addr
µPD75P0016
PC
13-0
<– addr
$addr 1 2 µPD750004 *7
PC
11-0
<– addr
µPD750006, µPD750008
PC
12-0
<– addr
µPD75P0016
PC
13-0
<– addr
$addr1 1 2 µPD750004 *7
PC
11-0
<– addr1
µPD750006, µPD750008
PC
12-0
<– addr1
µPD75P0016
PC
13-0
<– addr1
PCDE 2 3 µPD750004
PC
11-0
<– PC
11-8
+DE
µPD750006, µPD750008
PC
12-0
<– PC
12-8
+DE
µPD75P0016
PC
13-0
<– PC
13-8
+DE
PCXA 2 3 µPD750004
PC
11-0
<– PC
11-8
+XA
µPD750006, µPD750008
PC
12-0
<– PC
12-8
+XA
µPD75P0016
PC
13-0
<– PC
13-8
+XA
BCDE 2 3 µPD750004 *11
PC
11-0
<– BCDE
Note 1
µPD750006, µPD750008
PC
12-0
<– BCDE
Note 2
µPD75P0016
PC
13-0
<– BCDE
Note 3