7.3.5DAC CONTROL/STATUS REGISTER BADR1 + 8
This register selects the DAC gain/range and update modes. This is a
WRITE
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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- | - | - | - | DAC1R1 | DAC1R0 | DAC0R1 | DAC0R0 | MODE | - | - | - | - | - | DACEN | - |
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DACEN
MODE
DACnR[1:0]
This bit enables the Analog Out features of the board. 1 = DAC0/1 enabled.
0 = DAC0/1 disabled.
The
This bit determines the analog output mode of operation.
1 = Both DAC0 and DAC1 updated with data written to DAC0 data register. 0 = DACn updated with data written to DACn data register.
The
These bits select the independent gains/ranges for either DAC0 or DAC1. n=0 for DAC0 and n=1 for DAC1.
DACnR1 | DACnR0 | Range | LSB Size |
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0 | 0 | Bipolar 5V | 2.44mV |
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0 | 1 | Bipolar 10V | 4.88mV |
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1 | 0 | Unipolar 5V | 610uV |
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1 | 1 | Unipolar 10V | 1.22mV |
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