The following tables summarizes all possible Offset/Range configurations:
PCI-DAS1002
UNIBIP | GS1 | GS0 | Input Range | Input Gain | Measurement |
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| Resolution |
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0 | 0 | 0 | ±10V | 1 | 4.88 mV |
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0 | 0 | 1 | ± 5V | 2 | 2.44 mV |
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0 | 1 | 0 | ±2.5V | 4 | 1.22 mV |
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0 | 1 | 1 | ±1.25V | 8 | 610 uV |
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1 | 0 | 0 | 1 | 2.44 mV | |
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1 | 0 | 1 | 2 | 1.22 mV | |
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1 | 1 | 0 | 4 | 610 uV | |
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1 | 1 | 1 | 8 | 305 uV | |
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PCI-DAS1001
UNIBIP | GS1 | GS0 | Input Range | Input Gain | Measurement |
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| Resolution |
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0 | 0 | 0 | ±10V | 1 | 4.88 mV |
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0 | 0 | 1 | ± 1V | 10 | 488 uV |
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0 | 1 | 0 | ±0.1V | 100 | 48.8 uV |
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0 | 1 | 1 | ±0.01V | 1,000 | 4.88 uV |
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1 | 0 | 0 | 1 | 2.44 mV | |
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1 | 0 | 1 | 10 | 244 uV | |
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1 | 1 | 0 | 100 | 24.4 uV | |
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1 | 1 | 1 | 1,000 | 2.44 uV | |
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ADPS[1:0] These bits select the ADC Pacer Source. Maximum Internal/External Pacer frequency is 330KHz.
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| ADPS1 |
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| ADPS0 |
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| Pacer Source |
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| 0 |
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| 0 |
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| SW Convert |
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| 1 |
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| 82C54 Counter/Timer |
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| 1 |
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| 0 |
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| External Falling |
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| External Rising |
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| Note: For ADPS[1:0] = 00 case, SW conversions are initiated |
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| via a word write to BADR2 + 0. Data is 'don't care.' |
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READ |
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15 | 14 | 13 | 12 |
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| 10 | 9 | 8 |
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| 2 | 1 | 0 | |
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- | EOC | - | - |
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EOC |
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| 1 = ADC DONE |
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| 0 = ADC BUSY |
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20