7.3.4 CALIBRATION REGISTER
See "Calibrating The
BADR1 + 6
This register controls all autocal operations. This is a
WRITE
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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SDI | CALEN | CSRC2 | CSRC1 | CSRC0 | - | SEL7376 | SEL8800 | - | - | - | - | - | - | - | - |
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SEL8800 This bit enables the
DAC Channel | Cal Function |
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0 | DAC0 Fine Gain |
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1 | DAC0 Coarse Gain |
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2 | DAC0 Offset |
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3 | DAC1 Offset |
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4 | DAC1 Fine Gain |
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5 | DAC1 Coarse Gain |
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6 | ADC Coarse Offset |
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7 | ADC Fine Offset |
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SEL7376 This bit latches the
CSRC[2:0] These bits select the different calibration sources available to the ADC front end.
CSRC2 | CSRC1 | CSRC0 | Cal Source |
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0 | 0 | 0 | AGND |
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0 | 0 | 1 | 7.0V |
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0 | 1 | 0 | 3.5V |
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0 | 1 | 1 | 1.75V |
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1 | 0 | 0 | 0.875V |
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1 | 0 | 1 | 8.6mV |
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1 | 1 | 0 | VDAC0 |
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1 | 1 | 1 | VDAC1 |
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CALEN This bit is used to enable Cal Mode.
1 = Selected Cal Source, CSRC[2:0], is fed into Analog Channel 0. 0 = Analog Channel 0 functions as normal input.
SDI Serial Data In. This bit is used to set serial address/data stream for the DAC8800 TrimDac and 7376 digital potentiometer. Used in conjunction with SEL8800 and SEL7376 bits.
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