3. Configuration Options
3-28 December 2002 9000-A2-GB31-00
Synchronous Network InterfaceFrameSaver Models 9820-2M and 9820-8M have an EIA-530-A ne twork interface.
PSD Mask
Possible Settings: Symmetric
Default Setting: Symmetric
Read-only. Specifies the Power Spectral Density (PS D) mask the unit will use. The value
of PSD Mask in part determines what DSL Line Rates are available. If a change in the
PSD Mask setting (available in a future release) renders the current DSL Line Rate
invalid, the Line Rate Mode is set to AutoRate.
Asymmetric – (Future use.) The unit uses the asymmetric PSD mask.
Symmetric – The unit uses the symmetric PSD mask.
Table 3-12. SHDSL Network Physical Interface Options (2 of 2)
Table 3-13. Synchronous Network Data Port Physical Interface Options (1 of 2)
Port Type
Possible Settings: E530, V.35, X.21
Default Setting: V.35
Selects the type of port to be used for the network data port.
E530 – The port is configured as an EIA-530-A-compatible DTE. An
EIA-530-A-compatible DCE can be directly connected to the DB25 connector for this port
on the rear of the FrameSaver unit.
V.35 – The port is configured as a V.35-compatible DTE. A V.35-compatible DCE can be
connected to the DB25 connector for this port using an adapter cable on the rear of the
FrameSaver unit.
X.21 – The port is configured as a V.11/X.21-compatible DTE. A V.11/X.21-compatible
DCE can be connected to the DB25 connector for this port using an adapter cable on the
rear of the FrameSaver unit.
Invert Internal Clock
Possible Settings: Enable, Disable
Default Setting: Disable
Specifies whether the internal clock (used for timing data transmitted to the DCE) will be
phase-inverted with respect to the clock received at the interface. This option is useful
when long cable lengths between the FrameSaver device and the DCE are causing
errors.
Enable – The internal clock used to transmit data to the DCE is phase inverted with
respect to the clock supplied by the DCE to this port.
Disable – The internal clock is not inverted (normal).