Renesas R61509V manual 240 ⋅ DisplayLines NL, Example

R61509V Target Spec

The VSYNC interface has the minimum for RAM data write speed and internal clock frequency, which must be more than the values calculated from the following formulas, respectively.

Internal clock frequency (fosc) [Hz]

=FrameFrequency ⋅ ( DisplayLines( NL ) + FrontPorch( FP ) + BackPorch( BP ))⋅ 23( clocks )⋅ var iance

RAMWriteSpeed(min.)[ Hz ] >	240	⋅ DisplayLines( NL )
	( BackPorch( BP ) + DisplayLines( NL ) − m arg ins )⋅ 23( clocks )⋅		1
			fosc

Note: When RAM write operation is not started right after the falling edge of VSYNCX, the time from the falling edge of VSYNCX until the start of RAM write operation must also be taken into account.

An example of calculating minimum RAM writing speed and internal clock frequency in VSYNC interface operation is as follows.

[Example]
Panel size	240 RGB ⋅ 432 lines (NL = 6’h35: 432 lines)
Total number of lines (NL)	432 lines
Back/front porch	14/2 lines (BP = 4h’E, FP = 4’h2)
Frame frequency	60 Hz
Internal clock frequency	678 kHz

Internal clock frequency (fosc) [Hz] = 678 kHz ⋅ 1.07 / 1.0 = 726 kHz

Notes: 1. When setting the internal clock frequency, possible causes of fluctuation must also be taken into consideration. In this example, the internal clock frequency allows for a margin of ±7% for variances and guarantee that display operation is completed within one VSYNCX cycle.

2.This example includes variances attributed to LSI fabrication process and room temperature. Other possible causes of variances, such as differences in voltage change are not considered in this example. It is necessary to include a margin for these factors.

Minimum speed for RAM writing [Hz]

>240 ⋅ 432 / {((14 + 432 - 2) lines ⋅ 23 clocks) ⋅ 1/726 kHz} = 7.4 MHz

Notes: 1. In this example, it is assumed that the R61509V starts writing data in the internal RAM on the falling edge of VSYNCX.

2.There must be at least a margin of 2 lines between the line to which the R61509V has just written data and the line where display operation on the LCD is performed.

In this example, the RAM write operation at a speed of 7.4 MHz or more, which starts on the falling edge of VSYNCX, guarantees the completion of data write operation in a certain line address before the R61509V starts the display operation of the data written in that line and can write moving picture data without causing flicker on the display.

Rev. 0.11 April 25, 2008, page 113 of 181