output format
WIEGAND OUTPUT (DEFAULT)
Timing Diagram
| 100us |
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| 1ms |
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| 5V |
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| 0V |
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| 5V |
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| 0V |
| 1 | 2 | 3 |
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| *n : 34 or 26 | |||||||||||||||||||||||||
LOGIC | 0 | 1 | 1 | 1 | 0 |
| 0 |
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Data Type (26-bit /34-bit)
•Even parity bits from Bit 2 to Bit 13 / Bit 2 to Bit 17
•Bit 2 to Bit25 / Bit 2 to Bit33 :
•Bit 26 / Bit 34 : Odd parity bits from Bit 14 to Bit 25 / Bit 18 to Bit 33
26_ output format