Appendix B: BIOS POST Codes

POST (hex)

2Fh

30h

31h

32h

33h

34h

35h

36h

37h

38h

39h

3Ah

3Bh

3Ch

3Dh

3Eh

3Fh

40h

41h

42h

43h

44h

45h

46h

47h

48h

49h

4Ah

4Bh

4Ch

4Dh

4Eh

Defi nition

Reserved

Reserved

Reserved

Reserved

Reset keyboard except Winbond 977 series Super I/O chips

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Test 8254

Reserved

Test 8259 interrupt mask bits for channel 1

Reserved

Test 8259 interrupt mask bits for channel 2

Reserved

Reserved

Test 8259 functionality

Reserved

Reserved

Reserved

Initialize EISA slot

Reserved

1.Calculate total memory by testing the last double word of each 64K page.

2.Program writes allocation for AMDK5 CPU.

1.Initialize multi-language

2.Put information on screen display, including Award title, CPU type, CPU speed, etc.

Reserved

Reserved

Reserved

1.Program MTRR of M1 CPU.

2.Initialize L2 cache for P6 class CPU & program CPU with proper cacheable range.

3.Initialize the APIC for P6 class CPU.

4.On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges between each CPU are not identical.

4Fh

50h

51h

Reserved

Initialize USB

Reserved

B-3

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Image 91
SUPER MICRO Computer 5014C-MF user manual Appendix B Bios Post Codes