SUPER MICRO Computer P8SC8 Advanced Chipset Control, Dram Data Integrity Mode, On-Chip Serial ATA

Chapter 4: BIOS

4-4.2 Advanced Chipset Control

DRAM Data Integrity Mode

If enabled, this feature allows the data stored in the DRMA memory to be integrated for faster data processing. The options are ECC and Non- ECC.

On-Chip Frame Buffer Size

This setting allows you to set On-Chip Frame Buffer Size. The options are "1 MB" and "8 MB."

SATA Mode

This feature allows you to select the channel for SATA mode. The options are "IDE", "RAID" and "AHCI (-Advanced Host Controller Interface)."

On-Chip Serial ATA

Select "Disabled" to disable the SATA Controller. Select "Auto" to allow the BIOS to configure the SATA Controller automatically. Select "Combined Mode" to use PATA and SATA Combined Mode. The maximum of 2 IDE drives in each channel is allowed. Select "Enhanced Mode" to enable both SATA and PATA. This mode will support up to 6 IDE drives. Select "SATA Only" to allow SATA to operate in "Legacy Mode".

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