SUPER MICRO Computer X9DRG-HTF Active Processor Cores, Limit Cpuid Maximum, Intel AES-NI

Models: X9DRG-HTF X9DRG-HF

1 109
Download 109 pages 22.81 Kb
Page 77
Image 77

Chapter 4: AMI BIOS

Active Processor Cores

Set to Enabled to use a processor's second core and above. (Please refer to Intel's website for more information.) The options are All, 1, 2, 4 and 6.

Limit CPUID Maximum

This feature allows the user to set the maximum CPU ID value. Enable this function to boot the legacy operating systems that cannot support processors with extended CPUID functions. The options are Enabled and Disabled (for the Windows OS).

Execute-Disable Bit (Available if supported by the OS & the CPU)

Select Enabled to enable the Execute Disable Bit which will allow the processor to designate areas in the system memory where an application code can execute and where it cannot, thus preventing a worm or a virus from flooding illegal codes to overwhelm the processor or damage the system during an attack. The default is Enabled. (Refer to Intel and Microsoft Web sites for more information.)

Intel® AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc- tions (NI) to ensure data security. The options are Enabled and Disabled.

MLC Streamer Prefetcher (Available when supported by the CPU)

If set to Enabled, the MLC (mid-level cache) streamer prefetcher will prefetch streams of data and instructions from the main memory to the L2 cache to improve CPU performance. The options are Disabled and Enabled.

MLC Spatial Prefetch (Available when supported by the CPU)

If this feature is set to Disabled, The CPU prefetches the cache line for 64 bytes. If this feature is set to Enabled the CPU fetches both cache lines for 128 bytes as comprised. The options are Disabled and Enabled.

DCU Streamer Prefetcher (Available when supported by the CPU)

Select Enabled to support Data Cache Unite (DCU) prefetch of L1 data to speed up data accessing and processing in the DCU to enhance CPU performance. The options are Disabled and Enabled.

DCU IP Prefetcher

Select Enabled for DCU (Data Cache Unit) IP Prefetcher support, which will prefetch IP addresses to improve network connectivity and system performance. The options are Enabled and Disabled.

4-7

Page 77
Image 77
SUPER MICRO Computer X9DRG-HTF, X9DRG-HF Active Processor Cores, Limit Cpuid Maximum, Intel AES-NI, DCU IP Prefetcher