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3.5HHWIL: Identifying the First and Second Halfwords in
In the
When the host sends the two halfwords of a
There is one case when the
In the
3.6HAS: Forcing the HPI to Latch Control Information Early
The HAS signal is an address strobe that allows control information to be removed earlier in a host cycle, allowing more time to switch bus states from address to data information. This feature facilitates the interface for multiplexed address and data buses. In this type of system, an address latch enable (ALE) signal is often provided and is normally the signal connected to HAS.
Figure 2 and Figure 4 show examples of signal connections when HAS is used for multiplexed transfers. Figure 7 and Figure 8 show typical HPI signal activity when HAS is used. The process for using HAS is as follows:
1.The host selects the access type. The host drives the appropriate levels on the HCNTL [1:0] and HR/W signals, and indicates which halfword (first or second) will be transferred by driving HHWIL high or low.
2.The host drives HAS low. On the falling edge of HAS, the HPI latches the states of the HCNTL[1:0], HR/W, and HHWIL. The high to low transition of HAS must precede the falling edge of the internal strobe signal (internal HSTRB), which is derived from HCS, HDS1, and HDS2, as described in Section 3.3.
HCS does not gate the HAS input, which allows time for the host to perform the subsequent access. The HAS signal may be brought high after internal HSTRB goes low, indicating that the data access is about to occur. HAS is not required to be driven high at any time during the cycle, but eventually must transition high before the host uses it for another access with different values for HCNTL [1:0], HR/W, and HHWIL.
SPRUGK7A | Host Port Interface (HPI) | 17 |
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