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List of Figures

1

HPI Position in the Host-DSP System

7

2

Example of Host-DSP Signal Connections When Using the

 

Signal in the 32-Bit Multiplexed Mode

12

HAS

3

Example of Host-DSP Signal Connections When the

 

Signal is Tied High in the 32-Bit Multiplexed

 

HAS

 

 

Mode

13

4

Example of Host-DSP Signal Connections When Using the

 

Signal in the 16-Bit Multiplexed Mode

13

HAS

5

Example of Host-DSP Signal Connections When the

 

Signal is Tied High in the 16-Bit Multiplexed

 

HAS

 

 

Mode

14

6

HPI Strobe and Select Logic

15

7

16-Bit Multiplexed Mode Host Read Cycle Using

 

 

 

 

 

 

18

HAS

8

16-Bit Multiplexed Mode Host Write Cycle Using

 

 

 

 

 

 

 

 

19

HAS

9

16-Bit Multiplexed Mode Host Read Cycle With

 

 

 

Tied High

20

HAS

10

16-Bit Multiplexed Mode Host Write Cycle With

 

 

 

 

 

Tied High

21

HAS

11

16-Bit Multiplexed Mode Single-Halfword HPIC Cycle with

 

 

Tied High

22

HAS

12

 

Behavior During an HPIC or HPIA Read Cycle in the 16-Bit Multiplexed Mode

23

HRDY

13

 

 

Behavior During a Data Read Operation in the 16-Bit Multiplexed Mode (Case 1: HPIA Write

 

HRDY

 

 

Cycle Followed by Nonautoincrement HPID Read Cycle)

23

14

 

 

Behavior During a Data Read Operation in the 16-Bit Multiplexed Mode (Case 2: HPIA Write

 

HRDY

 

 

Cycle Followed by Autoincrement HPID Read Cycles)

23

15

 

 

Behavior During an HPIC Write Cycle in the 16-Bit Multiplexed Mode

24

HRDY

16

 

 

Behavior During a Data Write Operation in the 16-Bit Multiplexed Mode (Case 1: No

 

HRDY

 

 

Autoincrementing)

24

17

 

 

Behavior During a Data Write Operation in the 16-Bit Multiplexed Mode(Case 2: Autoincrementing

 

HRDY

 

 

Selected, FIFO Empty Before Write)

24

18

 

 

Behavior During a Data Write Operation in the 16-Bit Multiplexed Mode(Case 3: Autoincrementing

 

HRDY

 

 

Selected, FIFO Not Empty Before Write)

25

19

 

 

Behavior During an HPIC or HPIA Read Cycle in the 32-Bit Multiplexed Mode

25

HRDY

20

 

 

Behavior During a Data Read Operation in the 16-Bit Multiplexed Mode (Case 1: HPIA Write

 

HRDY

 

 

Cycle Followed by Nonautoincrement HPID Read Cycle)

26

21

 

 

Behavior During a Data Read Operation in the 32-Bit Multiplexed Mode (Case 2: HPIA Write

 

HRDY

 

 

Cycle Followed by Autoincrement HPID Read Cycles)

26

22

 

 

Behavior During an HPIC Write Cycle in the 32-Bit Multiplexed Mode

27

HRDY

23

 

 

Behavior During a Data Write Operation in the 32-Bit Multiplexed Mode (Case 1: No

 

HRDY

 

 

Autoincrementing)

27

24

 

 

Behavior During a Data Write Operation in the 32-Bit Multiplexed Mode (Case 2:

 

HRDY

 

 

Autoincrementing Selected, FIFO Empty Before Write)

28

25

 

 

Behavior During a Data Write Operation in the 32-Bit Multiplexed Mode (Case 3:

 

HRDY

 

 

Autoincrementing Selected, FIFO Not Empty Before Write)

28

26

Host-to-CPU Interrupt State Diagram

30

27

CPU-to-Host Interrupt State Diagram

31

28

FIFOs in the HPI

32

29

Power and Emulation Management Register (PWREMU_MGMT)

37

30

Host Access Permissions

38

31

CPU Access Permissions

38

32

Format of an Address Register (HPIAW or HPIAR) - Host Access Permissions

40

33

Format of an Address Register (HPIAW or HPIAR) - CPU Access Permissions

40

34

Data Register (HPID) (Host access permissions, CPU cannot access HPID)

41

4

List of Figures

SPRUGK7A –March 2009 –Revised July 2010

Copyright © 2009–2010, Texas Instruments Incorporated

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Texas Instruments TMS320C6457 manual List of Figures
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TMS320C6457 specifications

The Texas Instruments TMS320C6457 is a high-performance digital signal processor (DSP) designed for demanding applications in telecommunications, industrial control, and video processing. As part of the TMS320C6000 family, the C6457 combines advanced features with impressive processing capabilities, making it a popular choice among developers looking for efficient and robust solutions.

One of the key features of the TMS320C6457 is its architecture, which is based on the super Harvard architecture. This design separates program and data memory paths, allowing for parallel instruction execution. The C6457 operates at clock speeds of up to 1 GHz, enabling it to deliver peak performance of over 6,000 MIPS (Million Instructions Per Second) and 12,000 MADDs (Multiply-Accumulate operations per second). Such high throughput makes the C6457 suitable for real-time processing applications that require rapid data handling.

The C6457 DSP integrates a rich set of on-chip resources, including up to 1MB of on-chip SRAM, which serves as a fast cache for data and instructions. The device features multiple high-speed interfaces, such as 10/100/1000 Ethernet, Serial RapidIO, and PCI-Express, facilitating seamless connectivity with other devices and systems. Furthermore, the TMS320C6457 supports various communication protocols, allowing it to adapt to a wide range of application scenarios.

In terms of power efficiency, the TMS320C6457 is designed with sophisticated power management features. It includes dynamic voltage and frequency scaling, which adjust power consumption based on workload requirements without compromising performance. This capability is particularly valuable in battery-operated devices or environments where thermal management is critical.

The TMS320C6457 also benefits from extensive software support, including the Texas Instruments DSP/BIOS real-time operating system and Code Composer Studio integrated development environment. Developers can leverage these tools for efficient code development, debugging, and system optimization. Additionally, Texas Instruments provides a range of libraries and algorithms optimized for the C6457, facilitating rapid application development.

Overall, the Texas Instruments TMS320C6457 DSP stands out due to its robust architecture, high processing capabilities, comprehensive connectivity options, and power management features. These attributes make it a versatile solution for a broad spectrum of applications in digital signal processing, where performance and efficiency are paramount. As technology continues to advance, the TMS320C6457 remains a relevant and potent option for developers seeking to push the boundaries of digital signal processing.
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