Xilinx ML403 specifications 24LC04 Control Byte Allocation, ML40x Schematic for IIC Connections

ML403 Board Information

R

ML403 Board Information

is ‘1010 for read and write operations. The A2, A1 bits are dont cares. The A0 bit is used by the master device to select which of the two 256-word blocks of memory are accessed. The 24LC04 write transactions are either a byte write or a page write. The page write begins the same as the byte write but instead of generating a stop condition the master transmits up to 16 data bytes to the 24LC04B. The 24LC04 supports current address, random, and sequential read operations.

Slave

Address

S								R/W	A
	1	0	1	0	A2	A1	A0

X979_10_012907

Figure 10: 24LC04 Control Byte Allocation

According to the MicroChip 24L024B data sheet, the ML403 board has a low-level output current (IOL) of 3.0 mA at a VCC of 2.5v. The ML403 boards are shipped in the configuration shown in Figure 11. The board must be modified for this design to work correctly. Replace the 10K Ohm R70 and R71resistors with 833 or 1K Ohm resistors. See Answer Record 24049 for additional information.

C280 VCC2V5

0.1 µF

1	24LC04B - I / ST
	A0	VCC
2	A1	WP
3	A2	SCL
4	A3	SDA
	U9	TSSOPS

	2	2
8	R70		R71
	10k		10k
7
	1	1
6			IIC_SCL
5			IIC_SDA

X979_11_022307

Figure 11: ML40x Schematic for IIC Connections

XAPP979 (v1.0) February 26, 2007 www.xilinx.com 9