Pico Communications E-15 manual CardBus / Digital Bus Interface

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CardBus / Digital Bus Interface

The Pico E-15 can run as a standalone product or be connected to a host using the CardBus connector. By default, the Pico E-15 ships with firmware that is ready for use as a CardBus device.

The CardBus interface is a subset of PCI. The data path is 32 bits wide and is synchronous. The wiring of the CardBus interface supports both completion and mastering of the bus.

When the Pico E-15 is not connected to a CardBus host, the digital bus can be reconfigured to connect with a wide variety of high speed digital busses and peripherals. With proper external termination, speeds of over 100 MHz are possible. The external digital bus can only interface with 3.3V logic.

Those who are interested in alternate interfaces should contact Pico Computing. The CardBus interface source code and support is available.

Electrical Specifications (DC)

Minimum

Nominal

Maximum

Positive Supply Input Voltage (Vcc)

3.25V

3.3V

3.35V

Low Level Input Voltage

-0.2V

0V

0.7V

High Level Input Voltage

2.0V

3.3V

3.35V

 

 

 

 

Recommended Drive Strength

 

8mA

 

Input Impedance

 

HI-Z

 

Internal Bus Voltage

 

3.3V

 

PCMCIA Interface Resources:

PCMCIA Website

www.pcmcia.org

PCI SIG Website

www.pci.org

Pico E-15 Hardware Reference

www.picocomputing.com

Pico Computing

 

(206) 283-2178

150 Nickerson Street. Suite 311

 

 

Seattle, WA 98109

Image 24 Contents
Pico E-15 Release For Hardware Revision DPage Product Overview Pico E-15 Quick Reference Datasheet IO ConnectivityStandard Part Numbers Standard Part NumberMilitary version is available which includes System Architecture Pico E-15 Electrical Specification Minimum Nominal MaximumField Programmable Gate Array PowerPC Processor PPC405x3 Processor IntroductionCpld TurboLoader Cpld Resources Xilinx Cpld WebsiteFlash Memory RAM DDR2 Sdram MemoryRAM Timing and Parameter Information Parameter Value EDK Value 133 MHz 333 MHzTemperature Sensor Electrical Specifications Minimum Nominal MaximumSleep Controller Tri-Mode Ethernet Interface Ethernet ResourcesDigital Peripheral Interface HI-ZHigh Speed Analog to Digital Converters VDC Low pass filter range is customizable via special order High Speed Digital to Analog Converters Page Video Digitizer External Connections Svideo Mode Video Digitizer External Connections Composite ModeVideo Digitizer Video Digitizer Resources TVP5150AM1 HomepageElectrical Specifications DC Minimum Nominal Maximum CardBus / Digital Bus InterfacePcmcia Interface Resources Pcmcia Website PCI SIG Website Jtag Debug Interface DeviceInstruction register bit length PSoC Debug Interface Appendix a Peripheral I/O Connector Information Connector InformationPeripheral I/O Connector Pinout Peripheral Connector Drawing Appendix B CardBus Connector Information FCICardBus Interface Schematic CardBus Connector Pinout PcicparPCICAD17 Appendix C Fpga Pinout Fpga PinoutCAD0 AA4 ETHERTX1 FLASHD11 RAMDQ5 Vdcfid Appendix D Cpld Pinout Cpld PinoutAppendix E PSoC Pinout PSoC PinoutAppendix F Standard Part Number Listing Standard Part Number ListingDevice Part Number Website Appendix G Errata Appendix H Fpga Performance Enhancements Revision History Legal Notices
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