Pico Communications E-15 manual PSoC Debug Interface

Page 26

26

PSoC Debug Interface

The Pico E-15 has a low power PSoC microcontroller (also known as the sleep controller) which controls the power to the rest of the board. The PSoC also generates a 24 MHz clock for the TurboLoader. The PSoC features an in-circuit programming interface, although it is unlinkey that a user will ever need to debug or modify the PSoC firmware.

To program the PSoC the following parts are required:

Description

Manufacturer

Part Number

Distributor

ISSP Programming Cable

Pico Computing

E15-PSoC

Pico Computing

PSoC ICE CUBE

Cypress

CY3215-DK

Digikey

Pico E-15 Hardware Reference

www.picocomputing.com

Pico Computing

 

(206) 283-2178

150 Nickerson Street. Suite 311

 

 

Seattle, WA 98109

Image 26 Contents
Pico E-15 Release For Hardware Revision DPage Product Overview Pico E-15 Quick Reference Datasheet IO ConnectivityMilitary version is available which includes Standard Part NumbersStandard Part Number System Architecture Pico E-15 Electrical Specification Minimum Nominal MaximumField Programmable Gate Array PowerPC Processor PPC405x3 Processor IntroductionCpld TurboLoader Cpld Resources Xilinx Cpld WebsiteFlash Memory RAM DDR2 Sdram MemoryRAM Timing and Parameter Information Parameter Value EDK Value 133 MHz 333 MHzTemperature Sensor Electrical Specifications Minimum Nominal MaximumSleep Controller Tri-Mode Ethernet Interface Ethernet ResourcesDigital Peripheral Interface HI-ZHigh Speed Analog to Digital Converters VDC Low pass filter range is customizable via special order High Speed Digital to Analog Converters Page Video Digitizer Video Digitizer External Connections Svideo ModeVideo Digitizer External Connections Composite Mode Video Digitizer Resources TVP5150AM1 HomepagePcmcia Interface Resources Pcmcia Website PCI SIG Website Electrical Specifications DC Minimum Nominal MaximumCardBus / Digital Bus Interface Instruction register bit length Jtag Debug InterfaceDevice PSoC Debug Interface Peripheral I/O Connector Pinout Appendix a Peripheral I/O Connector InformationConnector Information Peripheral Connector Drawing Appendix B CardBus Connector Information FCICardBus Interface Schematic CardBus Connector Pinout PcicparPCICAD17 Appendix C Fpga Pinout Fpga PinoutCAD0 AA4 ETHERTX1 FLASHD11 RAMDQ5 Vdcfid Appendix D Cpld Pinout Cpld PinoutAppendix E PSoC Pinout PSoC PinoutDevice Part Number Website Appendix F Standard Part Number ListingStandard Part Number Listing Appendix G Errata Appendix H Fpga Performance Enhancements Revision History Legal Notices
Related manuals
Manual 46 pages 9.43 Kb