Pico Communications E-15 manual Appendix E PSoC Pinout

Page 41

41

Appendix E – PSoC Pinout

PSoC Pinout

3\.\3\V\_\E\N\

23

3.3V Master Power Enable

O

CLOCK_24_HV

17

24 MHz TurboLoader Clock Out

O

POWERCTL_C

7

PSoC External Debug Clock

I/O

POWERCTL_D

10

PSoC External Debug Data

I/O

POWERCTL_FPGA_C

19

PSoC -> FPGA Clock

I/O

POWERCTL_FPGA_D

22

PSoC -> FPGA Data

I/O

POWERCTL_R

14

PSoC External Debug Reset

I

TEMP_SENSE_C\S\

24

Temperature Sensor Chip Select

O

TEMP_SENSE_SCK

4

Temperature Sensor Clock

O

TEMP_SENSE_SD

5

Temperature Sensor Data

I/O

Pico E-15 Hardware Reference

www.picocomputing.com

Pico Computing

 

(206) 283-2178

150 Nickerson Street. Suite 311

 

 

Seattle, WA 98109

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Contents
Release For Hardware Revision D Pico E-15Page Product Overview IO Connectivity Pico E-15 Quick Reference DatasheetMilitary version is available which includes Standard Part NumbersStandard Part Number System Architecture Minimum Nominal Maximum Pico E-15 Electrical SpecificationField Programmable Gate Array PPC405x3 Processor Introduction PowerPC ProcessorCpld Resources Xilinx Cpld Website Cpld TurboLoaderFlash Memory DDR2 Sdram Memory RAMParameter Value EDK Value 133 MHz 333 MHz RAM Timing and Parameter InformationElectrical Specifications Minimum Nominal Maximum Temperature SensorSleep Controller Ethernet Resources Tri-Mode Ethernet InterfaceHI-Z Digital Peripheral InterfaceHigh Speed Analog to Digital Converters VDC Low pass filter range is customizable via special order High Speed Digital to Analog Converters Page Video Digitizer External Connections Composite Mode Video Digitizer External Connections Svideo ModeVideo Digitizer Video Digitizer Resources TVP5150AM1 HomepagePcmcia Interface Resources Pcmcia Website PCI SIG Website Electrical Specifications DC Minimum Nominal MaximumCardBus / Digital Bus Interface Instruction register bit length Jtag Debug InterfaceDevice PSoC Debug Interface Peripheral I/O Connector Pinout Appendix a Peripheral I/O Connector InformationConnector Information Peripheral Connector Drawing FCI Appendix B CardBus Connector InformationCardBus Interface Schematic Pcicpar CardBus Connector PinoutPCICAD17 Fpga Pinout Appendix C Fpga PinoutCAD0 AA4 ETHERTX1 FLASHD11 RAMDQ5 Vdcfid Cpld Pinout Appendix D Cpld PinoutPSoC Pinout Appendix E PSoC PinoutDevice Part Number Website Appendix F Standard Part Number ListingStandard Part Number Listing Appendix G Errata Appendix H Fpga Performance Enhancements Revision History Legal Notices
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